__sync_swap* with acq/rel/full memory barrier semantics

Jakub Jelinek jakub@redhat.com
Thu Jun 2 19:25:00 GMT 2011


On Thu, Jun 02, 2011 at 02:12:38PM -0500, Aldy Hernandez wrote:

> +/* This function expands a fine grained atomic exchange operation:
> +   atomically store VAL in MEM and return the previous value in MEM.
> +
> +   MEMMODEL is the memory model variant to use.
> +   TARGET is an option place to stick the return value.  */
> +
> +rtx
> +expand_sync_mem_exchange (enum memmodel model, rtx mem, rtx val, rtx target)
> +{
> +  enum machine_mode mode = GET_MODE (mem);
> +  enum insn_code icode;
> +  direct_optab op;
> +
> +  switch (model)
> +    {
> +    case MEMMODEL_RELAXED:
> +      /* ?? Eventually we should either just emit the atomic
> +	 instruction without any barriers (and thus allow movements
> +	 and transformations), or emit a relaxed builtin.
> +
> +	 It is still not clear whether any transformations are
> +	 permissible on the atomics (for example, CSE might break
> +	 coherence), so we might need to emit a relaxed builtin.
> +
> +         Until we figure this out, be conservative and fall
> +         through.  */
> +    case MEMMODEL_SEQ_CST:
> +      op = sync_mem_exchange_seq_cst_optab;
> +      break;
> +    case MEMMODEL_ACQUIRE:
> +      op = sync_mem_exchange_acq_optab;
> +      break;
> +    case MEMMODEL_RELEASE:
> +      op = sync_mem_exchange_rel_optab;
> +      break;
> +    case MEMMODEL_ACQ_REL:
> +      op = sync_mem_exchange_acq_rel_optab;
> +      break;

Wouldn't it be better to pass the model (as an extra CONST_INT
operand) to the expanders?  Targets where atomic instructions always act
as full barriers could just ignore that argument, other could decide what
to do based on the value.

	Jakub



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