[PATCH, ARM] Cortex-A5 tuning [2/2] - tweak instruction conditionalisation

Richard Earnshaw rearnsha@arm.com
Wed Jun 1 16:00:00 GMT 2011

On Wed, 2011-06-01 at 16:49 +0100, Julian Brown wrote:
> This patch tweaks the behaviour of arm_final_prescan_insn when tuning
> for Cortex-A5 cores, since branches are cheaper than long sequences of
> conditionalised instructions on those processors. As posted in the
> previous patch, this provides a measurable increase in performance on a
> popular embedded benchmark.
> (I didn't use the tuning infrastructure for this one, though it could
> easily be changed to do so, now I come to think of it.)
> Testing is still in progress. OK to apply, pending success with that?
> Thanks,
> Julian
> ChangeLog
>     gcc/
>     * config/arm/arm.c (arm_tune_cortex_a5): New variable.
>     (arm_option_override): Use above. Set max_insns_skipped to 1 when
>     tuning for Cortex-A5.
>     * config/arm/arm.h (arm_tune_cortex_a5): Add declaration.

I would much prefer that this was done through the tuning
infrastructure.  If one core likes it this way, there's a strong chance
of another one coming along that has similar preferences.


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