[Patch wwwdocs] Update docs with respect to changes for ARM.

[Richard Earnshaw]

On Thu, 2011-01-20 at 21:36 +0000, Ramana Radhakrishnan wrote:
> Hi,
> 
> I think I've managed to scrub together all the relevant changes for
> ARM for the past year and here's a patch that reflects it. I am
> slightly suspicious of the wording I've put together for the
> fstrict-volatile-bitfields option and that's the one thing that I'd
> like some review on.
> 
> 
> cheers
> Ramana

+    <li>Several improvements were submitted to improve code 
+      generation for the ARM architecture including a rewritten 
+      implementation for load and store multiples.</li>

Submitted? or Committed?  I'd suggest

        <li>Improvements to code generation for the ARM architecture,
        including a rewritten...

+    <li>Several enhancements were submitted to improve SIMD code 
+      generation for NEON by adding support for widening instructions, 
+      misaligned loads and stores, vector conditionals and 
+      support for 64 bit arithmetic.</li>

likewise.

+    <li> The command line option <code>-fstrict-volatile-bitfields</code> 
+      has been turned on by default for AAPCS configurations whereby volatile
+      bitfield members of aggregates are accessed by a single access of the
+      width of the field's type, aligned to a natural alignment if possible.

I'd suggest here:

        <li> GCC for AAPCS configurations now more closely adheres to
        the AAPCS specification by enabling
        <code>-fstrict-volatile-bitfields</code> by default.
        
R.