[Patch 4/4] ARM 64 bit sync atomic operations [V2]

[Ramana Radhakrishnan]

On 26 July 2011 10:02, Dr. David Alan Gilbert <david.gilbert@linaro.org> wrote:
>
>        gcc/
>        * config/arm/arm.c (TARGET_HAVE_DMB_MCR) MCR Not available in Thumb1
>          but is available on armv6

`:' after (TARGET_HAVE_DMB_MCR) and something like

`Disable for Thumb1.'

instead of what's on there.

>
>  /* Nonzero if this chip implements a memory barrier via CP15.  */
> -#define TARGET_HAVE_DMB_MCR    (arm_arch6k && ! TARGET_HAVE_DMB)
> +#define TARGET_HAVE_DMB_MCR    (arm_arch6 && ! TARGET_HAVE_DMB \
> +                                && ! TARGET_THUMB1)

Otherwise OK for trunk and afflicted release branches since this
really is a bug fix.

cheers
Ramana