[Patch,AVR]: Solve PR42210

[Georg-Johann Lay]

This solves some missed optimization that can be seen when moving
around bits.

There are 4 combiner patterns that operate on regs and one that uses
them as intermediate patterns and works on I/O. Even if just an
intermediate pattern matches it's still an improvement because avoid
of shift.

Tested on some home-brew example.

Ok if I see no regressions?

Johann

2011-04-20  Georg-Johann Lay  <avr@gjlay.de>

	PR target/42210

	* config/avr/avr.md ("*movbitqi.1-6.a", "*movbitqi.1-6.b",
	"*movbitqi.0", "*movbitqi.7", "*movbitqi.io"): New insns.
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