[PATCH, i386]: Fix PR target/46153

[Uros Bizjak]

Hello!

> Attached patch fixed PR target/46153. The problem was, that expanders
> didn't use fixed-up destination RTX, returned from
> ix86_fixup_binary_operands.
>
> Since the expanded insns now satisfy ix86_binary_operator_ok, we can
> use this function as insn predicate to prevent combine from creating
> invalid instructions (FWIW, these were later fixed by reload). Please
> also note, that ix86_fixup_binary_operands include a couple of
> optimizations (i.e. when both input operands are loaded from the same
> memory address).
>
> 2010-10-28  Uros Bizjak  <ubizjak@gmail.com>
>
>        PR target/46153
>        * config/i386/sse.md (sse_movhlps_exp): Use destination
>        returned from ix86_fixup_binary_operands to expand insn.
>        (sse_movlhps_exp): Ditto.
>        (sse_loadhps_exp): Ditto.
>        (sse_loadlps_exp): Ditto.
>        (sse2_loadhpd_exp): Ditto.
>        (sse2_loadlpd_exp): Ditto.

I have reverted this part of the patch:

>        (*avx_movhlps): Use ix86_binary_operator_ok in insn predicate.
>        (sse_movhlps): Ditto.
>        (*avx_movlhps): Ditto.
>        (sse_movlhps): Ditto.
>        (*avx_loadhps): Ditto.
>        (sse_loadhps): Ditto.
>        (*avx_loadhpd): Ditto.
>        (sse_loadhpd): Ditto.
>        (*avx_storelps): Prevent both operands in memory.
>        (sse_storelps): Ditto.

This part regressed in gcc.target/i386/sse-1.c (combine combined the
insn with a memory operand 2 and this blocked combination with matched
memory operands 0 and 1). Since this was not actually the part of the
bug, I simply removed these changes.

Uros.