[patch] Cleanup and improvement of if-conversion for vectorization

[Sebastian Pop]

On Thu, May 27, 2010 at 04:48, Richard Guenther <rguenther@suse.de> wrote:
> On Wed, 26 May 2010, Sebastian Pop wrote:
>
>> On Wed, May 26, 2010 at 04:19, Richard Guenther <rguenther@suse.de> wrote:
>> > I still do not at all understand #3 and #4.  Please explain.
>>
>> 0002-Predicate-all-the-memory-writes.patch
>> 0003-Fix-creation-of-temp-variables.patch
>>
>> Before #2 the only variables that were created by the if-conversion
>> pass were scalar SSA names.  #2 allows reads and writes to memory.
>
> What do you mean?  In
>
>> D.2757_29 != 0 ? _ifc_.11 : _ifc_.12;
>
> I see non-SSA names _ifc_.11 and _ifc_.12 - that is not valid gimple.
>
> Neither would a COND_EXPR RHS with a memory store on the LHS be
> valid gimple.  I suppose I have to fix the verifier to barf on you
> here.
>
> A COND_EXPR RHS is not a memory load, so the statement should never
> get a VOP and thus the alias-oracle need not to care about it.

Ok, please fix verify_ssa ().  Note that I did not created SSA_NAMEs
for scalars not verifying is_gimple_reg because Jakub said in
http://gcc.gnu.org/ml/gcc/2010-04/msg00299.html

> if (!is_gimple_reg (var))
> you shouldn't create SSA name and change the lhs of the stmt.

The VUSEs appear on the COND_EXPRs only in codes where we cannot
create an SSA_NAME.

Sebastian