combine/dce patch for PR36003, PR42575

[Mike Stump]

On Jun 24, 2010, at 6:00 AM, Bernd Schmidt wrote:
> On 06/24/2010 02:53 PM, Eric Botcazou wrote:
>> 
>> The 3 words "adding a pass" always make me cringe. :-)  Couldn't this be 
>> integrated into one of the existing RTL passes?
> 
> I can tack it onto something else, but I don't see how this would reduce
> the amount of work we need to do?

Work needed to do is measured in cache misses.  A pass adds nothing but cache misses.  Inside a loop, if you get lucky enough, extra work adds 0.  Anyway, thats a very rough idea behind his statement.  Worse, the tradeoff generally just gets worse over time.  If you collect sample data at the instruction level, you can see the instructions that just sit and wait around for memory.  Very striking, if you expected the old, this instruction take 3 cycles, this one takes 11 mentality.  In the new world, all the instructions take 0, and the 1 trivial instruction, that should be free, that waits for memory take 60% of the processor time....