[PATCH] Enhance reload_cse_move2add

[Paolo Bonzini]

On 07/07/2010 06:54 PM, Jeff Law wrote:
> Note the patch changes the post-reload code, so while lifetimes are
> increased, it really doesn't affect register allocation.  So any
> regressions ought to be scheduling or other micro-architecture issues
> and I was having a hard time believing that we're going to see a
> measurable regression, particularly on any modern x86 implementation.

Out-of-order execution and elimination of inter-instruction dependencies 
(especially load-to-use dependencies) are much more important on modern 
x86 cores than Intel would like you to believe.  See PR38824 and PR27827 
for examples.

Also, even if scheduling is only decoding bandwidth, it may require more 
freedom than what IRA leaves.  Bernd's idea of turning regrename on at 
-O2 is a good one.

Paolo