RFA: Add support for Renesas RX architectiure to GCC

[Nick Clifton]

Hi Richard,

Thanks again for the continued reviewing.

> I'm not asking you to provide 64-bit support using 32-bit FP 
> instructions, I'm asking you to provide 32-bit support using 32-bit FP 
> instructions.  I.e. code compiled with -m64bit-doubles -ffast-math and 
> using "float" will use the hardware instructions.

Ah, understood - and implemented.

> For the parallel push/pop, you'll have to use a match_parallel 
> predicate, similar to the s390 "load_multiple_[sd]i" patterns.


Thanks - that was the pointer that I needed.  I have now reworked the 
push and pop patterns to use explicit register rtx's and the 
match_parallel operator where appropriate.  This has also fixed the 
debug info generation problems that I was having.


> I presume at some point you'll add DImode add and subtract patterns? 
> They should be trivial to implement with adc/sbb instructions.

Oops - I had meant to do this ages ago and completely forgot.  They are 
implemented now.


 >> Err, no it's not. My sequence is 20 bytes long, just the same as
 >> yours.
 >
 > Your TRAMPOLINE_SIZE allocates 24 bytes, is what I looked at.

Doh!  Yes that was wrong - fixed now.

Revised RX submission to follow, once I have finished testing.

Cheers
   Nick