[PATCH] Fix mips_expand_synci_loop

[David Daney]

Fu, Chao-Ying wrote:
> Hi,
> 
>   I got segmentation fault when calling __clear_cache() on MIPS 24kf.
> The reason may be a bug in mips_expand_synci_loop().
> We need to increment the "begin" rtx, then check against
> the "end" rtx.  Otherwise, "begin" may point to invalid memory address.
> 
> Ex: (Old code)
>   46c724:       rdhwr   v1,hwr_synci_step # v1 is 0x20 in 24kf
>   46c728:       synci   0(a1)    <---------- Seg Fault
>   46c72c:       sltu    v0,a2,a1 <---------- Check "begin" against "end"
>   46c730:       beqz    v0,46c728
>   46c734:       addu    a1,a1,v1 <---------- Increment "begin"
> 
> Ex: (New code)
>   46c724:       rdhwr   v1,hwr_synci_step
>   46c728:       synci   0(a1)
>   46c72c:       addu    a1,a1,v1
>   46c730:       sltu    v0,a2,a1
>   46c734:       beqz    v0,46c728
>   46c738:       nop
> 
>   Is this patch ok?  Thanks!
> 
> Regards,
> Chao-ying
> 
> gcc/ChangeLog
> 2009-10-05  Chao-ying Fu  <fu@mips.com>
> 
> 	* config/mips/mips.c (mips_expand_synci_loop): Increment the "begin" rtx,
> 	then check the "begin" rtx against the "end" rtx.
> 

I cannot approve the patch, but it seems plausible.

Can you tell us how it was tested?

Thanks,
David Daney


> Index: mips.c
> ===================================================================
> --- mips.c      (revision 152474)
> +++ mips.c      (working copy)
> @@ -6699,10 +6699,10 @@
> 
>    emit_insn (gen_synci (begin));
> 
> +  mips_emit_binary (PLUS, begin, begin, inc);
> +
>    cmp = mips_force_binary (Pmode, GTU, begin, end);
> 
> -  mips_emit_binary (PLUS, begin, begin, inc);
> -
>    cmp_result = gen_rtx_EQ (VOIDmode, cmp, const0_rtx);
>    emit_jump_insn (gen_condjump (cmp_result, label));
>  }  
>