Vector permutation support for x86

[Uros Bizjak]

Hello!

> -(define_insn_and_split "mulv16qi3"
> +(define_expand "mulv16qi3"
>    [(set (match_operand:V16QI 0 "register_operand" "")
>  	(mult:V16QI (match_operand:V16QI 1 "register_operand" "")
>  		    (match_operand:V16QI 2 "register_operand" "")))]
> -  "TARGET_SSE2
> -   && can_create_pseudo_p ()"
> -  "#"
> -  "&& 1"
> -  [(const_int 0)]
> +  "TARGET_SSE2"

	(mulv16qi3, vec_pack_trunc_v8hi, vec_pack_trunc_v4si,
	vec_pack_trunc_v2di): Use ix86_expand_vec_extract_even_odd.

Please leave this pattern in its "mult" form up to split1 pass, so
combine [and other passes] can process it as a multiplication
operator. Also, please see PR33329 and PR26449 for some troubles in
this area, when these patterns were split early.

(This change is not documented in ChangeLog, it looks like an
unintended change.)

Uros.