[patch, committed, ia64] Implement -mno-fused-madd on IA64.
Steve Ellcey
sje@cup.hp.com
Thu May 21 23:46:00 GMT 2009
The following patch implements the -mno-fused-madd option for IA64. The
normal fused instructions are easy to deal with, the vector ones are a
little trickier because IA64 has no vector add or subtract instructions.
You have to use a multiply/add or multiply/sub. In this case the
-mno-fused-madd forces the add or sub to be multiplied by a {1,1} vector
so that the add/sub cannot be combined with a subsequent multiply.
Tested on IA64 HP-UX with no regressions and some new tests are being
added to verify the option is functioning. I will check this in shortly.
Steve Ellcey
sje@cup.hp.com
2009-05-21 Steve Ellcey <sje@cup.hp.com>
PR target/37846
* config/ia64/ia64.opt (mfused-madd): New.
* config/ia64/ia64.h (TARGET_DEFAULT): Set MASK_FUSED_MADD.
* config/ia64/hpux.h (TARGET_DEFAULT): Ditto.
* config/ia64/ia64.md (maddsf4, msubsf4, nmaddsf4,
madddf4, madddf4_trunc, msubdf4, msubdf4_trunc, nmadddf4,
nmadddf4_truncsf, maddxf4, maddxf4_truncsf, maddxf4_truncdf,
msubxf4, msubxf4_truncsf msubxf4_truncdf, nmaddxf4,
nmaddxf4_truncsf, nmaddxf4_truncdf): Check TARGET_FUSED_MADD.
* config/ia64/vect.md (addv2sf3, subv2sf3): Force fpma/fpms
instruction if !TARGET_FUSED_MADD.
(fpma, fpms): Remove colon from name.
Index: config/ia64/ia64.opt
===================================================================
--- config/ia64/ia64.opt (revision 147727)
+++ config/ia64/ia64.opt (working copy)
@@ -178,4 +178,8 @@ msel-sched-dont-check-control-spec
Target Report Var(mflag_sel_sched_dont_check_control_spec) Init(0)
Don't generate checks for control speculation in selective scheduling
+mfused-madd
+Target Report Mask(FUSED_MADD)
+Enable fused multiply/add and multiply/subtract instructions
+
; This comment is to ensure we retain the blank line above.
Index: config/ia64/ia64.h
===================================================================
--- config/ia64/ia64.h (revision 147727)
+++ config/ia64/ia64.h (working copy)
@@ -94,7 +94,7 @@ enum ia64_inline_type
/* Default target_flags if no switches are specified */
#ifndef TARGET_DEFAULT
-#define TARGET_DEFAULT (MASK_DWARF2_ASM)
+#define TARGET_DEFAULT (MASK_DWARF2_ASM | MASK_FUSED_MADD)
#endif
#ifndef TARGET_CPU_DEFAULT
Index: config/ia64/hpux.h
===================================================================
--- config/ia64/hpux.h (revision 147727)
+++ config/ia64/hpux.h (working copy)
@@ -106,7 +106,7 @@ do { \
#undef TARGET_DEFAULT
#define TARGET_DEFAULT \
- (MASK_DWARF2_ASM | MASK_BIG_ENDIAN | MASK_ILP32)
+ (MASK_DWARF2_ASM | MASK_BIG_ENDIAN | MASK_ILP32 | MASK_FUSED_MADD)
/* ??? Might not be needed anymore. */
#define MEMBER_TYPE_FORCES_BLK(FIELD, MODE) ((MODE) == TFmode)
Index: config/ia64/ia64.md
===================================================================
--- config/ia64/ia64.md (revision 147727)
+++ config/ia64/ia64.md (working copy)
@@ -3106,7 +3106,7 @@ (define_insn "*maddsf4"
(plus:SF (mult:SF (match_operand:SF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:SF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:SF 3 "fr_reg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3115,7 +3115,7 @@ (define_insn "*msubsf4"
(minus:SF (mult:SF (match_operand:SF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:SF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:SF 3 "fr_reg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fms.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3132,7 +3132,7 @@ (define_insn "*nmaddsf4"
(minus:SF (match_operand:SF 3 "fr_reg_or_fp01_operand" "fG")
(mult:SF (match_operand:SF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:SF 2 "fr_reg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fnma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3303,7 +3303,7 @@ (define_insn "*madddf4"
(plus:DF (mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fma.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3313,7 +3313,7 @@ (define_insn "*madddf4_trunc"
(plus:DF (mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:DF 3 "fr_reg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3322,7 +3322,7 @@ (define_insn "*msubdf4"
(minus:DF (mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fms.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3332,7 +3332,7 @@ (define_insn "*msubdf4_trunc"
(minus:DF (mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG"))
(match_operand:DF 3 "fr_reg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fms.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3358,7 +3358,7 @@ (define_insn "*nmadddf4"
(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
(mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fnma.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3378,7 +3378,7 @@ (define_insn "*nmadddf4_truncsf"
(minus:DF (match_operand:DF 3 "fr_reg_or_fp01_operand" "fG")
(mult:DF (match_operand:DF 1 "fr_reg_or_fp01_operand" "fG")
(match_operand:DF 2 "fr_reg_or_fp01_operand" "fG")))))]
- ""
+ "TARGET_FUSED_MADD"
"fnma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3599,7 +3599,7 @@ (define_insn "*maddxf4"
(plus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fma %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3609,7 +3609,7 @@ (define_insn "*maddxf4_truncsf"
(plus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3619,7 +3619,7 @@ (define_insn "*maddxf4_truncdf"
(plus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fma.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3660,7 +3660,7 @@ (define_insn "*msubxf4"
(minus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG")))]
- ""
+ "TARGET_FUSED_MADD"
"fms %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3670,7 +3670,7 @@ (define_insn "*msubxf4_truncsf"
(minus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fms.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3680,7 +3680,7 @@ (define_insn "*msubxf4_truncdf"
(minus:XF (mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG"))
(match_operand:XF 3 "xfreg_or_fp01_operand" "fG"))))]
- ""
+ "TARGET_FUSED_MADD"
"fms.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3718,7 +3718,7 @@ (define_insn "*nmaddxf4"
(mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
)))]
- ""
+ "TARGET_FUSED_MADD"
"fnma %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3729,7 +3729,7 @@ (define_insn "*nmaddxf4_truncsf"
(mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
))))]
- ""
+ "TARGET_FUSED_MADD"
"fnma.s %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
@@ -3740,7 +3740,7 @@ (define_insn "*nmaddxf4_truncdf"
(mult:XF (match_operand:XF 1 "xfreg_or_fp01_operand" "fG")
(match_operand:XF 2 "xfreg_or_fp01_operand" "fG")
))))]
- ""
+ "TARGET_FUSED_MADD"
"fnma.d %0 = %F1, %F2, %F3"
[(set_attr "itanium_class" "fmac")])
Index: config/ia64/vect.md
===================================================================
--- config/ia64/vect.md (revision 147727)
+++ config/ia64/vect.md (working copy)
@@ -915,6 +915,11 @@ (define_expand "addv2sf3"
{
rtvec v = gen_rtvec (2, CONST1_RTX (SFmode), CONST1_RTX (SFmode));
operands[3] = force_reg (V2SFmode, gen_rtx_CONST_VECTOR (V2SFmode, v));
+ if (!TARGET_FUSED_MADD)
+ {
+ emit_insn (gen_fpma (operands[0], operands[1], operands[3], operands[2]));
+ DONE;
+ }
})
;; The split condition here could be combine_completed, if we had such.
@@ -960,6 +965,11 @@ (define_expand "subv2sf3"
{
rtvec v = gen_rtvec (2, CONST1_RTX (SFmode), CONST1_RTX (SFmode));
operands[3] = force_reg (V2SFmode, gen_rtx_CONST_VECTOR (V2SFmode, v));
+ if (!TARGET_FUSED_MADD)
+ {
+ emit_insn (gen_fpms (operands[0], operands[1], operands[3], operands[2]));
+ DONE;
+ }
})
;; The split condition here could be combine_completed, if we had such.
@@ -1001,7 +1011,7 @@ (define_insn "mulv2sf3"
"fpmpy %0 = %1, %2"
[(set_attr "itanium_class" "fmac")])
-(define_insn "*fpma"
+(define_insn "fpma"
[(set (match_operand:V2SF 0 "fr_register_operand" "=f")
(plus:V2SF
(mult:V2SF (match_operand:V2SF 1 "fr_register_operand" "f")
@@ -1011,7 +1021,7 @@ (define_insn "*fpma"
"fpma %0 = %1, %2, %3"
[(set_attr "itanium_class" "fmac")])
-(define_insn "*fpms"
+(define_insn "fpms"
[(set (match_operand:V2SF 0 "fr_register_operand" "=f")
(minus:V2SF
(mult:V2SF (match_operand:V2SF 1 "fr_register_operand" "f")
2009-05-21 Steve Ellcey <sje@cup.hp.com>
PR target/37846
* gcc.target/ia64/mfused-madd-vect.c: New test.
* gcc.target/ia64/mfused-madd.c: New test.
* gcc.target/ia64/mno-fused-madd-vect.c: New test.
* gcc.target/ia64/mno-fused-madd.c: New test.
Index: gcc.target/ia64/mfused-madd-vect.c
===================================================================
--- gcc.target/ia64/mfused-madd-vect.c (revision 0)
+++ gcc.target/ia64/mfused-madd-vect.c (revision 0)
@@ -0,0 +1,33 @@
+/* { dg-do compile */
+/* { dg-options "-O2 -ftree-vectorize" } */
+/* { dg-final { scan-assembler-not "fpmpy" } } */
+
+/* fpma and fpms will show in either way because there are no
+ specific vector add/sub instructions. So we just check for fpmpy. */
+
+#define N 16
+extern bar(float *, float *, float *, float *);
+void foo()
+{
+ int i;
+ float a[N], b[N], c[N], d[N];
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] + c[i] * d[i];
+ }
+ bar(a,b,c,d);
+#if 0
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] - c[i] * d[i];
+ }
+ bar(a,b,c,d);
+#endif
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] * c[i] + d[i];
+ }
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] * c[i] - d[i];
+ }
+ bar(a,b,c,d);
+}
Index: gcc.target/ia64/mfused-madd.c
===================================================================
--- gcc.target/ia64/mfused-madd.c (revision 0)
+++ gcc.target/ia64/mfused-madd.c (revision 0)
@@ -0,0 +1,64 @@
+/* { dg-do compile */
+/* { dg-options "-O2" } */
+/* { dg-final { scan-assembler-not "fmpy" } } */
+/* { dg-final { scan-assembler-not "fadd" } } */
+/* { dg-final { scan-assembler-not "fsub" } } */
+/* { dg-final { scan-assembler "fma" } } */
+/* { dg-final { scan-assembler "fms" } } */
+/* { dg-final { scan-assembler "fnma" } } */
+
+float foo01(float a, float b, float c) {return (a + b * c);}
+float foo02(float a, float b, float c) {return (a - b * c);}
+float foo03(float a, float b, float c) {return (a * b + c);}
+float foo04(float a, float b, float c) {return (a * b - c);}
+
+double foo05(double a, double b, double c) {return (a + b * c);}
+double foo06(double a, double b, double c) {return (a - b * c);}
+double foo07(double a, double b, double c) {return (a * b + c);}
+double foo08(double a, double b, double c) {return (a * b - c);}
+
+__float80 foo09(__float80 a, __float80 b, __float80 c) {return (a + b * c);}
+__float80 foo10(__float80 a, __float80 b, __float80 c) {return (a - b * c);}
+__float80 foo11(__float80 a, __float80 b, __float80 c) {return (a * b + c);}
+__float80 foo12(__float80 a, __float80 b, __float80 c) {return (a * b - c);}
+
+
+
+float foo20(double a, double b, double c) {return (float) (a + b * c);}
+float foo21(double a, double b, double c) {return (float) (a - b * c);}
+float foo22(double a, double b, double c) {return (float) (a * b + c);}
+float foo23(double a, double b, double c) {return (float) (a * b - c);}
+
+float foo24(__float80 a, __float80 b, __float80 c) {return (float) (a + b * c);}
+float foo25(__float80 a, __float80 b, __float80 c) {return (float) (a - b * c);}
+float foo26(__float80 a, __float80 b, __float80 c) {return (float) (a * b + c);}
+float foo27(__float80 a, __float80 b, __float80 c) {return (float) (a * b - c);}
+
+double foo28(__float80 a, __float80 b, __float80 c) {return (double) (a + b * c);}
+double foo29(__float80 a, __float80 b, __float80 c) {return (double) (a - b * c);}
+double foo30(__float80 a, __float80 b, __float80 c) {return (double) (a * b + c);}
+double foo31(__float80 a, __float80 b, __float80 c) {return (double) (a * b - c);}
+
+
+float foo001(float a, float b, double c) { return (a + b * c); }
+float foo002(float a, float b, double c) { return (a - b * c); }
+
+float foo005(float a, double b, double c) { return (a + b * c); }
+float foo006(float a, double b, double c) { return (a - b * c); }
+float foo007(float a, double b, double c) { return (a * b + c); }
+float foo008(float a, double b, double c) { return (a * b - c); }
+
+double foo009(double a, float b, double c) { return (a + b * c); }
+double foo010(double a, float b, double c) { return (a - b * c); }
+double foo011(double a, float b, double c) { return (a * b + c); }
+double foo012(double a, float b, double c) { return (a * b - c); }
+
+float foo013(float a, double b, __float80 c) { return (a + b * c); }
+float foo014(float a, double b, __float80 c) { return (a - b * c); }
+float foo017(double a, float b, __float80 c) { return (a + b * c); }
+float foo018(double a, float b, __float80 c) { return (a - b * c); }
+
+float foo021(float a, __float80 b, double c) { return (a + b * c); }
+float foo022(float a, __float80 b, double c) { return (a - b * c); }
+float foo023(float a, __float80 b, double c) { return (a * b + c); }
+float foo024(float a, __float80 b, double c) { return (a * b - c); }
Index: gcc.target/ia64/mno-fused-madd-vect.c
===================================================================
--- gcc.target/ia64/mno-fused-madd-vect.c (revision 0)
+++ gcc.target/ia64/mno-fused-madd-vect.c (revision 0)
@@ -0,0 +1,31 @@
+/* { dg-do compile */
+/* { dg-options "-O2 -mno-fused-madd -ftree-vectorize" } */
+/* { dg-final { scan-assembler "fpmpy" } } */
+
+/* fpma and fpms will show in either way because there are no
+ specific vector add/sub instructions. So we just check for fpmpy. */
+
+#define N 16
+extern bar(float *, float *, float *, float *);
+void foo()
+{
+ int i;
+ float a[N], b[N], c[N], d[N];
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] + c[i] * d[i];
+ }
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] - c[i] * d[i];
+ }
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] * c[i] + d[i];
+ }
+ bar(a,b,c,d);
+ for (i = 0; i < N; i++) {
+ a[i] = b[i] * c[i] - d[i];
+ }
+ bar(a,b,c,d);
+}
Index: gcc.target/ia64/mno-fused-madd.c
===================================================================
--- gcc.target/ia64/mno-fused-madd.c (revision 0)
+++ gcc.target/ia64/mno-fused-madd.c (revision 0)
@@ -0,0 +1,64 @@
+/* { dg-do compile */
+/* { dg-options "-O2 -mno-fused-madd" } */
+/* { dg-final { scan-assembler-not "fma" } } */
+/* { dg-final { scan-assembler-not "fms" } } */
+/* { dg-final { scan-assembler-not "fnma" } } */
+/* { dg-final { scan-assembler "fmpy" } } */
+/* { dg-final { scan-assembler "fadd" } } */
+/* { dg-final { scan-assembler "fsub" } } */
+
+float foo01(float a, float b, float c) {return (a + b * c);}
+float foo02(float a, float b, float c) {return (a - b * c);}
+float foo03(float a, float b, float c) {return (a * b + c);}
+float foo04(float a, float b, float c) {return (a * b - c);}
+
+double foo05(double a, double b, double c) {return (a + b * c);}
+double foo06(double a, double b, double c) {return (a - b * c);}
+double foo07(double a, double b, double c) {return (a * b + c);}
+double foo08(double a, double b, double c) {return (a * b - c);}
+
+__float80 foo09(__float80 a, __float80 b, __float80 c) {return (a + b * c);}
+__float80 foo10(__float80 a, __float80 b, __float80 c) {return (a - b * c);}
+__float80 foo11(__float80 a, __float80 b, __float80 c) {return (a * b + c);}
+__float80 foo12(__float80 a, __float80 b, __float80 c) {return (a * b - c);}
+
+
+
+float foo20(double a, double b, double c) {return (float) (a + b * c);}
+float foo21(double a, double b, double c) {return (float) (a - b * c);}
+float foo22(double a, double b, double c) {return (float) (a * b + c);}
+float foo23(double a, double b, double c) {return (float) (a * b - c);}
+
+float foo24(__float80 a, __float80 b, __float80 c) {return (float) (a + b * c);}
+float foo25(__float80 a, __float80 b, __float80 c) {return (float) (a - b * c);}
+float foo26(__float80 a, __float80 b, __float80 c) {return (float) (a * b + c);}
+float foo27(__float80 a, __float80 b, __float80 c) {return (float) (a * b - c);}
+
+double foo28(__float80 a, __float80 b, __float80 c) {return (double) (a + b * c);}
+double foo29(__float80 a, __float80 b, __float80 c) {return (double) (a - b * c);}
+double foo30(__float80 a, __float80 b, __float80 c) {return (double) (a * b + c);}
+double foo31(__float80 a, __float80 b, __float80 c) {return (double) (a * b - c);}
+
+
+float foo001(float a, float b, double c) { return (a + b * c); }
+float foo002(float a, float b, double c) { return (a - b * c); }
+
+float foo005(float a, double b, double c) { return (a + b * c); }
+float foo006(float a, double b, double c) { return (a - b * c); }
+float foo007(float a, double b, double c) { return (a * b + c); }
+float foo008(float a, double b, double c) { return (a * b - c); }
+
+double foo009(double a, float b, double c) { return (a + b * c); }
+double foo010(double a, float b, double c) { return (a - b * c); }
+double foo011(double a, float b, double c) { return (a * b + c); }
+double foo012(double a, float b, double c) { return (a * b - c); }
+
+float foo013(float a, double b, __float80 c) { return (a + b * c); }
+float foo014(float a, double b, __float80 c) { return (a - b * c); }
+float foo017(double a, float b, __float80 c) { return (a + b * c); }
+float foo018(double a, float b, __float80 c) { return (a - b * c); }
+
+float foo021(float a, __float80 b, double c) { return (a + b * c); }
+float foo022(float a, __float80 b, double c) { return (a - b * c); }
+float foo023(float a, __float80 b, double c) { return (a * b + c); }
+float foo024(float a, __float80 b, double c) { return (a * b - c); }
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