[Patch ARM] Improve Thumb2 code generation.

Ramana Radhakrishnan ramana.radhakrishnan@arm.com
Tue May 19 10:09:00 GMT 2009


Hi, 

The Thumb2 backend currently 

* Doesn't support generation of bics with shift operators.
* Doesn't support the generation of the orn instruction.


I'm currently testing this patch that fixes these for an arm-none-eabi cross
target on a qemu target with code generation enabled by default for a
cortex-a8 core. Ok to commit if no regressions ?

2009-05-19  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

	* config/arm/arm.md (*arm_iorsi3): Refactored for only ARM. 
	(peephole ior (reg, int) -> mov, ior): Refactored for only ARM. 
	* config/arm/thumb2.md (*thumb_andsi_not_shiftsi_si): Allow bic
	with shifts for Thumb2.
     	(orsi_notsi): New for orn.
	(*thumb_orsi_notshiftsi_si): Allow orn with shifts.
	(*thumb2_iorsi3): Rewrite support for iorsi for Thumb2.
	* config/arm/arm.c (const_ok_for_op): Split case for IOR for Thumb2.
	(arm_gen_constant): Set can_invert for IOR and Thumb2, Add comments.

	Don't invert remainder for IOR.

cheers
Ramana

Ramana Radhakrishnan
GNU Tools Engineer
ARM Ltd. (www.arm.com)


-------------- next part --------------
A non-text attachment was scrubbed...
Name: orn-patch-for-testing.patch
Type: application/octet-stream
Size: 6536 bytes
Desc: not available
URL: <http://gcc.gnu.org/pipermail/gcc-patches/attachments/20090519/12be528f/attachment.obj>


More information about the Gcc-patches mailing list