Re: PATCH: PR target/40470: unable to find a register to spill in class ‘SSE_FIRST_REG’

H.J. Lu hjl.tools@gmail.com
Thu Jun 18 00:37:00 GMT 2009


On Wed, Jun 17, 2009 at 5:05 PM, Dave
Korn<dave.korn.cygwin@googlemail.com> wrote:
> H.J. Lu wrote:
>> On Wed, Jun 17, 2009 at 11:34 AM, Jeff Law<law@redhat.com> wrote:
>>> H.J. Lu wrote:
>>>> On Wed, Jun 17, 2009 at 11:18 AM, Vladimir Makarov<vmakarov@redhat.com>
>>>> wrote:
>>>>
>>>>> I am agree with Jeff and Richard.  There is one more reason to avoid
>>>>> using
>>>>> hard registers.  Usage of hard registers tends to create more spill
>>>>> failures
>>>>> in reload.
>>>>>
>>>> It is not like you have a choice here. The register for those insns is
>>>> fixed.
>>>> Sooner or later you have to allocate xmm0 for them.
>>>>
>>> And how is that different from any other port that has insns which require
>>> specific registers for particular insns.  This is nothing new or uncommon.
>>>
>>
>> Have you compared generated codes on such insns with and
>> without early hard register assignment? My observations are
>> early hard register assignment improves RA on insn with
>> fixed hard registers:
>>
>> http://gcc.gnu.org/bugzilla/show_bug.cgi?id=40480
>
>  It is very possible there is a real problem in this area.  I recently(*) was
> investigating the code generated by an inline asm which used the x86-specific
> "a" constraint to force one of the operands into %eax.  I found that the
> compiler generated a seemingly pointless spill-and-restore (effectively it
> combined a dead store with a nop move!) unless I used a register asm to force
> the operand into %eax early.  This code:
>

That matches my observation. I don't know where the real
problem is.

-- 
H.J.



More information about the Gcc-patches mailing list