[PATCH][ARM] Add a missing fix in a previous patch for ICE 64-bit moves (rev 147612)

[Doug Kwan (關振德)]

Hi,

This is a follow up of the following patch:

http://gcc.gnu.org/ml/gcc-patches/2009-05/msg00994.html

which fixes an ICE bug in adddi3.  A similar problem exists in subdi3
but Richard's original patch does not fix that.  The patch below
addresses the remaining issue.  it has been tested on
arm-unknown-linux-gnueabi with no new regressions.

-Doug

2009-07-21  Doug Kwan  <dougkwan@google.com>

ChangeLog:

	* config/arm/arm.md (subdi3) Copy non-reg values to DImode registers.

testsuite/ChangeLog:

	* gcc.c-torture/compile/20090721-1.c: New test.


----------------------------------
Index: gcc/gcc/testsuite/gcc.c-torture/compile/20090721-1.c
===================================================================
--- gcc/gcc/testsuite/gcc.c-torture/compile/20090721-1.c	(revision 0)
+++ gcc/gcc/testsuite/gcc.c-torture/compile/20090721-1.c	(revision 0)
@@ -0,0 +1,3 @@
+/* { dg-options "-fno-tree-sra" } */
+union u {double d;long long ll;};
+f(double x, int n){union u
v;v.d=x;if(n>=0){v.ll<<=63;}else{v.ll-=1<<-n;v.ll>>=-n;}return v.ll;}
Index: gcc/gcc/config/arm/arm.md
===================================================================
--- gcc/gcc/config/arm/arm.md	(revision 149866)
+++ gcc/gcc/config/arm/arm.md	(working copy)
@@ -981,9 +981,9 @@
   if (TARGET_THUMB1)
     {
       if (GET_CODE (operands[1]) != REG)
-        operands[1] = force_reg (SImode, operands[1]);
+        operands[1] = force_reg (DImode, operands[1]);
       if (GET_CODE (operands[2]) != REG)
-        operands[2] = force_reg (SImode, operands[2]);
+        operands[2] = force_reg (DImode, operands[2]);
      }	
   "
 )