[PATCH] Fix store_bit_field_1 (PR target/38707)

Richard Guenther richard.guenther@gmail.com
Sat Jan 3 19:49:00 GMT 2009


On Sat, Jan 3, 2009 at 8:29 PM, Jakub Jelinek <jakub@redhat.com> wrote:
> Hi!
>
> This patch fixes
> -FAIL: gcc.c-torture/execute/20050121-1.c compilation,  -O0  (internal compiler error)
> -UNRESOLVED: gcc.c-torture/execute/20050121-1.c execution,  -O0
> -FAIL: gcc.c-torture/execute/20050121-1.c compilation,  -O1  (internal compiler error)
> -UNRESOLVED: gcc.c-torture/execute/20050121-1.c execution,  -O1
> -FAIL: gcc.c-torture/execute/20050121-1.c compilation,  -O2  (internal compiler error)
> -UNRESOLVED: gcc.c-torture/execute/20050121-1.c execution,  -O2
> -FAIL: gcc.c-torture/execute/20050121-1.c compilation,  -O3 -fomit-frame-pointer  (internal compiler error)
> -UNRESOLVED: gcc.c-torture/execute/20050121-1.c execution,  -O3 -fomit-frame-pointer
> -FAIL: gcc.c-torture/execute/20050121-1.c compilation,  -O3 -g  (internal compiler error)
> -UNRESOLVED: gcc.c-torture/execute/20050121-1.c execution,  -O3 -g
> -FAIL: gcc.dg/compat/scalar-return-4 c_compat_y_tst.o compile,  (internal compiler error)
> -UNRESOLVED: gcc.dg/compat/scalar-return-4 c_compat_x_tst.o-c_compat_y_tst.o link
> -UNRESOLVED: gcc.dg/compat/scalar-return-4 c_compat_x_tst.o-c_compat_y_tst.o execute
> on i686-linux with RUNTESTFLAGS=--target_board=unix/-m32/-mtune=pentium-m
> Earlier store_bit_field_1 wraps op0 into a subreg, so that it has integral
> mode, but when unsuccessfully attempting movstrict* insn this is undone,
> so it can't be masked etc.
>
> Fixed by working on a temporary instead of op0, so that when movstrict*
> expansion fails, op0 is untouched.
>
> Bootstrapped/regtested on i686-linux, ok for trunk?

Ok.

Thanks,
Richard.

> 2009-01-03  Jakub Jelinek  <jakub@redhat.com>
>
>        PR target/38707
>        * expmed.c (store_bit_field_1): Don't modify op0 if movstrict insn
>        can't be used.
>
> --- gcc/expmed.c.jj     2008-11-18 19:24:09.000000000 +0100
> +++ gcc/expmed.c        2009-01-03 16:47:25.000000000 +0100
> @@ -1,7 +1,7 @@
>  /* Medium-level subroutines: convert bit-field store and extract
>    and shifts, multiplies and divides to rtl instructions.
>    Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
> -   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
> +   1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009
>    Free Software Foundation, Inc.
>
>  This file is part of GCC.
> @@ -532,6 +532,7 @@ store_bit_field_1 (rtx str_rtx, unsigned
>       int icode = optab_handler (movstrict_optab, fieldmode)->insn_code;
>       rtx insn;
>       rtx start = get_last_insn ();
> +      rtx arg0 = op0;
>
>       /* Get appropriate low part of the value being stored.  */
>       if (GET_CODE (value) == CONST_INT || REG_P (value))
> @@ -552,11 +553,11 @@ store_bit_field_1 (rtx str_rtx, unsigned
>          gcc_assert (GET_MODE (SUBREG_REG (op0)) == fieldmode
>                      || GET_MODE_CLASS (fieldmode) == MODE_INT
>                      || GET_MODE_CLASS (fieldmode) == MODE_PARTIAL_INT);
> -         op0 = SUBREG_REG (op0);
> +         arg0 = SUBREG_REG (op0);
>        }
>
>       insn = (GEN_FCN (icode)
> -                (gen_rtx_SUBREG (fieldmode, op0,
> +                (gen_rtx_SUBREG (fieldmode, arg0,
>                                  (bitnum % BITS_PER_WORD) / BITS_PER_UNIT
>                                  + (offset * UNITS_PER_WORD)),
>                                  value));
>
>        Jakub
>



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