[AVX]: More AVX updates
H.J. Lu
hjl.tools@gmail.com
Mon May 26 15:17:00 GMT 2008
On Sat, May 24, 2008 at 06:42:54PM -0700, H.J. Lu wrote:
> On Sat, May 24, 2008 at 10:19:06AM -0700, H.J. Lu wrote:
> > On Fri, May 23, 2008 at 02:48:45PM -0700, H.J. Lu wrote:
> > > Hi Uros,
> > >
> > > How about this patch?
> > >
> >
> > Here is the updated patch. I added %v as prefix and %d to
> > print_reg. We can add AVX support to most SSE patterns directly.
> >
> >
> > H.J.
> > ---
> > 2008-05-24 H.J. Lu <hongjiu.lu@intel.com>
> >
> > * config/i386/gas.h (ASM_OUTPUT_OPCODE): Undefine before
> > define. Use ASM_OUTPUT_AVX_PREFIX.
> >
> > * config/i386/i386.c (print_reg): Handle 'd' to duplicate
> > the operand.
> > (print_operand): Handle 'd'.
> >
> > * config/i386/i386.h (ASM_OUTPUT_AVX_PREFIX): New.
> > (ASM_OUTPUT_OPCODE): Likewise.
> >
> > * config/i386/i386.md (*movdi_2): Support AVX.
> > (*movdf_nointeger): Likewise.
> >
> > * config/i386/mmx.md (*mov<mode>_internal_rex64_avx): Removed.
> > (*mov<mode>_internal_rex64): Support AVX.
> >
> > * config/i386/sse.md (*avx_storehps): Removed.
> > (sse_storehps): Support AVX.
> > (*vec_dupv2df): Remove AVX support.
> >
>
> We should print duplicated register operand only for AVX instruction.
> Here is the updated patch.
>
>
I am checking this patch into AVX branch to use "%v" and "%d0" for
AVX support in i386.md.
Thanks.
H.J.
---
2008-05-26 H.J. Lu <hongjiu.lu@intel.com>
* config/i386/i386.md (*movsi_1): Use "%v" and "%d0" for AVX
support.
(*movsf_1): Likewise.
(*movdf_integer_rex64): Likewise.
(*extendsfdf2_mixed): Likewise.
(*truncdfsf_fast_mixed): Likewise.
(*truncdfsf_fast_sse): Likewise.
(*truncdfsf_mixed): Likewise.
(fix_trunc<mode>di_sse): Likewise.
(*extendsfdf2_sse): Likewise.
(fix_trunc<mode>si_sse): Likewise.
(*float<SSEMODEI24:mode><MODEF:mode>2_sse_interunit): Likewise.
(*rcpsf2_sse): Likewise.
(*rsqrtsf2_sse): Likewise.
(*sqrt<mode>2_sse): Likewise.
(sse4_1_round<mode>2): Likewise.
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md (revision 2763)
+++ config/i386/i386.md (working copy)
@@ -1509,26 +1509,20 @@
{
case TYPE_SSELOG1:
if (get_attr_mode (insn) == MODE_TI)
- return TARGET_AVX ? "vpxor\t%0, %0, %0"
- : "pxor\t%0, %0";
- return TARGET_AVX ? "vxorps\t%0, %0, %0"
- : "xorps\t%0, %0";
+ return "%vpxor\t%0, %d0";
+ return "%vxorps\t%0, %d0";
case TYPE_SSEMOV:
switch (get_attr_mode (insn))
{
case MODE_TI:
- return TARGET_AVX ? "vmovdqa\t{%1, %0|%0, %1}"
- : "movdqa\t{%1, %0|%0, %1}";
+ return "%vmovdqa\t{%1, %0|%0, %1}";
case MODE_V4SF:
- return TARGET_AVX ? "vmovaps\t{%1, %0|%0, %1}"
- : "movaps\t{%1, %0|%0, %1}";
+ return "%vmovaps\t{%1, %0|%0, %1}";
case MODE_SI:
- return TARGET_AVX ? "vmovd\t{%1, %0|%0, %1}"
- : "movd\t{%1, %0|%0, %1}";
+ return "%vmovd\t{%1, %0|%0, %1}";
case MODE_SF:
- return TARGET_AVX ? "vmovss\t{%1, %0|%0, %1}"
- : "movss\t{%1, %0|%0, %1}";
+ return "%vmovss\t{%1, %0|%0, %1}";
default:
gcc_unreachable ();
}
@@ -2364,7 +2358,7 @@
return "movq\t{%1, %0|%0, %1}";
case TYPE_SSELOG1:
- return TARGET_AVX ? "vpxor\t%0, %0, %0" : "pxor\t%0, %0";
+ return "%vpxor\t%0, %d0";
case TYPE_MMXADD:
return "pxor\t%0, %0";
@@ -2747,16 +2741,14 @@
return "mov{l}\t{%1, %0|%0, %1}";
case 5:
if (get_attr_mode (insn) == MODE_TI)
- return TARGET_AVX ? "vpxor\t%0, %0, %0" : "pxor\t%0, %0";
+ return "%vpxor\t%0, %d0";
else
- return TARGET_AVX ? "vxorps\t%0, %0, %0": "xorps\t%0, %0";
+ return "%vxorps\t%0, %d0";
case 6:
if (get_attr_mode (insn) == MODE_V4SF)
- return TARGET_AVX ? "vmovaps\t{%1, %0|%0, %1}"
- : "movaps\t{%1, %0|%0, %1}";
+ return "%vmovaps\t{%1, %0|%0, %1}";
else
- return TARGET_AVX ? "vmovss\t{%1, %0, %0|%0, %0, %1}"
- : "movss\t{%1, %0|%0, %1}";
+ return "%vmovss\t{%1, %d0|%d0, %1}";
case 7:
if (TARGET_AVX)
return REG_P (operands[1]) ? "vmovss\t{%1, %0, %0|%0, %0, %1}"
@@ -2764,14 +2756,12 @@
else
return "movss\t{%1, %0|%0, %1}";
case 8:
- return TARGET_AVX ? "vmovss\t{%1, %0|%0, %1}"
- : "movss\t{%1, %0|%0, %1}";
+ return "%vmovss\t{%1, %0|%0, %1}";
case 9: case 10: case 14: case 15:
return "movd\t{%1, %0|%0, %1}";
case 12: case 13:
- return TARGET_AVX ? "vmovd\t{%1, %0|%0, %1}"
- : "movd\t{%1, %0|%0, %1}";
+ return "%vmovd\t{%1, %0|%0, %1}";
case 11:
return "movq\t{%1, %0|%0, %1}";
@@ -3077,11 +3067,11 @@
switch (get_attr_mode (insn))
{
case MODE_V4SF:
- return TARGET_AVX ? "vxorps\t%0, %0, %0" : "xorps\t%0, %0";
+ return "%vxorps\t%0, %d0";
case MODE_V2DF:
- return TARGET_AVX ? "vxorpd\t%0, %0, %0" : "xorpd\t%0, %0";
+ return "%vxorpd\t%0, %d0";
case MODE_TI:
- return TARGET_AVX ? "vpxor\t%0, %0, %0" : "pxor\t%0, %0";
+ return "%vpxor\t%0, %d0";
default:
gcc_unreachable ();
}
@@ -3091,17 +3081,13 @@
switch (get_attr_mode (insn))
{
case MODE_V4SF:
- return TARGET_AVX ? "vmovaps\t{%1, %0|%0, %1}"
- : "movaps\t{%1, %0|%0, %1}";
+ return "%vmovaps\t{%1, %0|%0, %1}";
case MODE_V2DF:
- return TARGET_AVX ? "vmovapd\t{%1, %0|%0, %1}"
- : "movapd\t{%1, %0|%0, %1}";
+ return "%vmovapd\t{%1, %0|%0, %1}";
case MODE_TI:
- return TARGET_AVX ? "vmovdqa\t{%1, %0|%0, %1}"
- : "movdqa\t{%1, %0|%0, %1}";
+ return "%vmovdqa\t{%1, %0|%0, %1}";
case MODE_DI:
- return TARGET_AVX ? "vmovq\t{%1, %0|%0, %1}"
- : "movq\t{%1, %0|%0, %1}";
+ return "%vmovq\t{%1, %0|%0, %1}";
case MODE_DF:
if (TARGET_AVX)
{
@@ -3113,21 +3099,16 @@
else
return "movsd\t{%1, %0|%0, %1}";
case MODE_V1DF:
- return TARGET_AVX ? "vmovlpd\t{%1, %0|%0, %1}"
- : "movlpd\t{%1, %0|%0, %1}";
+ return "%vmovlpd\t{%1, %d0|%d0, %1}";
case MODE_V2SF:
- return TARGET_AVX ? "vmovlps\t{%1, %0|%0, %1}"
- : "movlps\t{%1, %0|%0, %1}";
+ return "%vmovlps\t{%1, %d0|%d0, %1}";
default:
gcc_unreachable ();
}
case 9:
case 10:
- if (TARGET_AVX)
- return "vmovq\t{%1, %0|%0, %1}";
- else
- return "movd\t{%1, %0|%0, %1}";
+ return "%vmovq\t{%1, %0|%0, %1}";
default:
gcc_unreachable();
@@ -4265,10 +4246,7 @@
return output_387_reg_move (insn, operands);
case 2:
- if (TARGET_AVX)
- return "vcvtss2sd\t{%1, %0, %0|%0, %0, %1}";
- else
- return "cvtss2sd\t{%1, %0|%0, %1}";
+ return "%vcvtss2sd\t{%1, %d0|%d0, %1}";
default:
gcc_unreachable ();
@@ -4282,8 +4260,7 @@
[(set (match_operand:DF 0 "nonimmediate_operand" "=x")
(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "xm")))]
"TARGET_SSE2 && TARGET_SSE_MATH"
- "* return TARGET_AVX ? \"vcvtss2sd\t{%1, %0, %0|%0, %0, %1}\"
- : \"cvtss2sd\t{%1, %0|%0, %1}\";"
+ "%vcvtss2sd\t{%1, %d0|%d0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "DF")])
@@ -4414,10 +4391,7 @@
case 0:
return output_387_reg_move (insn, operands);
case 1:
- if (TARGET_AVX)
- return "vcvtsd2ss\t{%1, %0, %0|%0, %0, %1}";
- else
- return "cvtsd2ss\t{%1, %0|%0, %1}";
+ return "%vcvtsd2ss\t{%1, %d0|%d0, %1}";
default:
gcc_unreachable ();
}
@@ -4433,8 +4407,7 @@
(float_truncate:SF
(match_operand:DF 1 "nonimmediate_operand" "xm")))]
"TARGET_SSE2 && TARGET_SSE_MATH"
- "* return TARGET_AVX ? \"vcvtsd2ss\t{%1, %0, %0|%0, %0, %1}\"
- : \"cvtsd2ss\t{%1, %0|%0, %1}\";"
+ "%vcvtsd2ss\t{%1, %d0|%d0, %1}"
[(set_attr "type" "ssecvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "SF")])
@@ -4463,10 +4436,7 @@
case 1:
return "#";
case 2:
- if (TARGET_AVX)
- return "vcvtsd2ss\t{%1, %0, %0|%0, %0, %1}";
- else
- return "cvtsd2ss\t{%1, %0|%0, %1}";
+ return "%vcvtsd2ss\t{%1, %d0|%d0, %1}";
default:
gcc_unreachable ();
}
@@ -4757,8 +4727,7 @@
(fix:DI (match_operand:MODEF 1 "nonimmediate_operand" "x,m")))]
"TARGET_64BIT && SSE_FLOAT_MODE_P (<MODE>mode)
&& (!TARGET_FISTTP || TARGET_SSE_MATH)"
- "* return TARGET_AVX ? \"vcvtts<ssemodefsuffix>2si{q}\t{%1, %0|%0, %1}\"
- : \"cvtts<ssemodefsuffix>2si{q}\t{%1, %0|%0, %1}\";"
+ "%vcvtts<ssemodefsuffix>2si{q}\t{%1, %0|%0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODE>")
@@ -4770,9 +4739,7 @@
(fix:SI (match_operand:MODEF 1 "nonimmediate_operand" "x,m")))]
"SSE_FLOAT_MODE_P (<MODE>mode)
&& (!TARGET_FISTTP || TARGET_SSE_MATH)"
- "* return TARGET_AVX
- ? \"vcvtts<ssemodefsuffix>2si\t{%1, %0|%0, %1}\"
- :\"cvtts<ssemodefsuffix>2si\t{%1, %0|%0, %1}\";"
+ "%vcvtts<ssemodefsuffix>2si\t{%1, %0|%0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODE>")
@@ -5444,11 +5411,7 @@
"(<SSEMODEI24:MODE>mode != DImode || TARGET_64BIT)
&& SSE_FLOAT_MODE_P (<MODEF:MODE>mode) && TARGET_SSE_MATH
&& (TARGET_INTER_UNIT_CONVERSIONS || optimize_size)"
- "* return TARGET_AVX
- ? \"vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t\"
- \"{%1, %0, %0|%0, %0, %1}\"
- : \"cvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t\"
- \"{%1, %0|%0, %1}\";"
+ "%vcvtsi2s<MODEF:ssemodefsuffix><SSEMODEI24:rex64suffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sseicvt")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "<MODEF:MODE>")
@@ -16196,8 +16159,7 @@
(unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
UNSPEC_RCP))]
"TARGET_SSE_MATH"
- "* return TARGET_AVX ? \"vrcpss\t{%1, %0, %0|%0, %0, %1}\"
- : \"rcpss\t{%1, %0|%0, %1}\";"
+ "%vrcpss\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sse")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "SF")])
@@ -16774,8 +16736,7 @@
(unspec:SF [(match_operand:SF 1 "nonimmediate_operand" "xm")]
UNSPEC_RSQRT))]
"TARGET_SSE_MATH"
- "* return TARGET_AVX ? \"vrsqrtss\t{%1, %0, %0|%0, %0, %1}\"
- : \"rsqrtss\t{%1, %0|%0, %1}\";"
+ "%vrsqrtss\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sse")
(set_attr "prefix" "maybe_vex")
(set_attr "mode" "SF")])
@@ -16795,8 +16756,7 @@
(sqrt:MODEF
(match_operand:MODEF 1 "nonimmediate_operand" "xm")))]
"SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH"
- "* return TARGET_AVX ? \"vsqrts<ssemodefsuffix>\t{%1, %0, %0|%0, %0, %1}\"
- : \"sqrts<ssemodefsuffix>\t{%1, %0|%0, %1}\";"
+ "%vsqrts<ssemodefsuffix>\t{%1, %d0|%d0, %1}"
[(set_attr "type" "sse")
(set_attr "mode" "<MODE>")
(set_attr "prefix" "maybe_vex")
@@ -17854,8 +17814,7 @@
(match_operand:SI 2 "const_0_to_15_operand" "n")]
UNSPEC_ROUND))]
"TARGET_ROUND"
- "* return TARGET_AVX ? \"vrounds<ssemodefsuffix>\t{%2, %1, %0, %0|%0, %0, %1, %2}\"
- : \"rounds<ssemodefsuffix>\t{%2, %1, %0|%0, %1, %2}\";"
+ "%vrounds<ssemodefsuffix>\t{%2, %1, %d0|%d0, %1, %2}"
[(set_attr "type" "ssecvt")
(set_attr "prefix_extra" "1")
(set_attr "prefix" "maybe_vex")
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