[AVX]: Add AVX support to *sse_prologue_save_insn

[H.J. Lu]

Hi,

I am checking this patch to add AVX support to *sse_prologue_save_insn
so that we can use -Wa,-msse-check=error -mavx with gcc. This fix
doesn't support 256bit registers.  We will change it when AVX support
is added to varargs.

Thanks.

H.J.
Index: ChangeLog.avx
===================================================================
--- ChangeLog.avx	(revision 135862)
+++ ChangeLog.avx	(working copy)
@@ -1,3 +1,7 @@
+2008-05-23  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/i386/i386.md (*sse_prologue_save_insn): Support AVX.
+
 2008-05-25  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* config/i386/gas.h (ASM_OUTPUT_OPCODE): Undefine before
Index: config/i386/i386.md
===================================================================
--- config/i386/i386.md	(revision 135862)
+++ config/i386/i386.md	(working copy)
@@ -21436,6 +21436,8 @@
   "TARGET_64BIT"
   "")
 
+;; FIXME: Is this used by variable arguments? We need to properly
+;; update it for 256bit AVX registers.
 (define_insn "*sse_prologue_save_insn"
   [(set (mem:BLK (plus:DI (match_operand:DI 0 "register_operand" "R")
 			  (match_operand:DI 4 "const_int_operand" "n")))
@@ -21465,7 +21467,7 @@
       PUT_MODE (operands[4], TImode);
       if (GET_CODE (XEXP (operands[0], 0)) != PLUS)
         output_asm_insn ("rex", operands);
-      output_asm_insn ("movaps\t{%5, %4|%4, %5}", operands);
+      output_asm_insn ("%vmovaps\t{%5, %4|%4, %5}", operands);
     }
   (*targetm.asm_out.internal_label) (asm_out_file, "L",
 				     CODE_LABEL_NUMBER (operands[3]));
@@ -21477,6 +21479,7 @@
    (set_attr "length" "135")
    (set_attr "memory" "store")
    (set_attr "modrm" "0")
+   (set_attr "prefix" "maybe_vex")
    (set_attr "mode" "DI")])
 
 (define_expand "prefetch"