[PATCH] Do not use a REG_EQUAL value for gcse/cprop if SRC is a REG

[Richard Guenther]

On Sun, May 25, 2008 at 2:04 PM, Steven Bosscher <stevenb.gcc@gmail.com> wrote:
> On Sun, May 25, 2008 at 1:55 PM, Richard Guenther
> <richard.guenther@gmail.com> wrote:
>>> Can you think of a way to expose this redundancy at the tree level
>>> somehow?  It'd be nice if we could just CSE the address of
>>> "tails[chain]" on GIMPLE...
>>
>> We would need to lower the memory accesses exposing address arithmetic.  On
>> the memref branch you see initial IL like
> (...)
>> with the optimized IL
>>
>> <bb 2>:
>>  D.1187_3 = IDX <0 + chain_1(D) * 4>;
>>  D.1183_4 = MEM <struct cpp_dir * {3}, &tails + D.1187_3>;
>>  if (D.1183_4 != 0B)
>>    goto <bb 3>;
>>  else
>>    goto <bb 5>;
>>
>> <bb 5>:
>>  goto <bb 4>;
>>
>> <bb 3>:
>>  IMEM <struct cpp_dir * {3}, D.1183_4> = p_8(D);
>>
>> <bb 4>:
>>  MEM <struct cpp_dir * {3}, &tails + D.1187_3> = p_8(D);
>
> OK, so "&tails + D.1187_3" is fully redundant in bb4, and that's the
> expression my second PRE GCSE pass eliminates.  I would have expected
> tree FRE to eliminate this on your branch. Any reason why it doesn't /
> shouldn't?

The addition isn't "lowered", tails and D.1187_3 are two operands to the MEM
(both MEM and IMEM have a base and an offset operand).  In theory it can
be re-written as

  tmp_1 = &tails + D.1187_3;
  IMEM <struct cpp_dir * {3}, tmp_1>

but usually exposing the real base (&tails) in the memory reference itself makes
alias analysis more precise and offset-based disambiguation easier.

Richard.