[stack]: [PATCH, i386]: Revert "Align DImode to 32 bits" patch.

H.J. Lu hjl.tools@gmail.com
Mon Mar 24 03:35:00 GMT 2008


On Sun, Mar 23, 2008 at 01:07:38PM +0100, Uros Bizjak wrote:
> Hello!
>
> There are numerous problems w.r.t. to alignment of DImode to 32 bits:
>
> - it is not clear if this new alignment violates store layout ABI 
> requirements
> - it violates MS bitfields spec (testsuite failures)
> - can misalign SSE and MMX DImode loads
> - can stall store forwarding when DImode crosses 16byte boundary on stack
>
> Due to above problems, I have revert DImode alignment patch, so DImode is 
> now aligned back to its natural alignment (8bytes). It is simply too much 
> pain for too low gain.
>
> OTOH, the patch uncovered misaligned SSE constants in constant pool.
>

I am checking this patch into stack branch.


H.J.
---
2008-03-23  Uros Bizjak  <ubizjak@gmail.com>

	Revert:
	2008-03-05  H.J. Lu  <hongjiu.lu@intel.com>

	* config/i386/i386-modes.def: Use 4 byte alignment on DI for
	32bit host.

	2008-03-19  Uros Bizjak  <ubizjak@gmail.com>

	PR target/35496
	* stor-layout.c (update_alignment_for_field): Set minimum alignment
	of the underlying type of a MS bitfield layout to the natural
	alignment of the type.

Index: gcc/stor-layout.c
===================================================================
--- gcc/stor-layout.c	(revision 133460)
+++ gcc/stor-layout.c	(revision 133461)
@@ -699,9 +699,6 @@
 		 && ! integer_zerop (DECL_SIZE (rli->prev_field)))))
 	{
 	  unsigned int type_align = TYPE_ALIGN (type);
-	  unsigned int type_size
-	    = tree_low_cst (TYPE_SIZE (type), 1);
-	  type_align = MAX (type_align, type_size);
 	  type_align = MAX (type_align, desired_align);
 	  if (maximum_field_alignment != 0)
 	    type_align = MIN (type_align, maximum_field_alignment);
Index: gcc/config/i386/i386-modes.def
===================================================================
--- gcc/config/i386/i386-modes.def	(revision 133460)
+++ gcc/config/i386/i386-modes.def	(revision 133461)
@@ -17,10 +17,6 @@
 along with GCC; see the file COPYING3.  If not see
 <http://www.gnu.org/licenses/>.  */
 
-/* In 32bit, DI mode uses 32bit registers.  Only 4 byte alignment
-   is needed.  */
-ADJUST_ALIGNMENT (DI, (TARGET_64BIT || TARGET_ALIGN_DOUBLE) ? 8 : 4);
-
 /* The x86_64 ABI specifies both XF and TF modes.
    XFmode is __float80 is IEEE extended; TFmode is __float128
    is IEEE quad.  */



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