[PATCH, MIPS] Add support for cins Octeon instruction

[Adam Nemet]

Richard Sandiford wrote:
> and:SI is fine.
> 
>     (and:SI ... (const_int 0xff000000))
> 
> is really:
> 
>     (and:SI ... (const_int -0x1000000))
> 
> because const_ints are stored in sign-extended form, and because
> we require 64bit HOST_WIDE_INTs on 64-bit MIPS targets.

Ah, sorry, I got confused and didn't realize that I was claiming and:SI
to be completely broken.  Of course you're right:

> ;; Note that if the upper bit of the mask is set in an SImode operation,
> ;; the mask itself will be sign-extended.  mask_low_and_shift_len will
> ;; therefore be greater than our threshold of 32.

Thanks for working this one out without much help from me :(.

I reboostrapped and retested on mips64octeon-unknown-linux-gnu.  OK?

Adam

-------------- next part --------------
A non-text attachment was scrubbed...
Name: cins-2.patch
Type: text/x-patch
Size: 6582 bytes
Desc: not available
URL: <http://gcc.gnu.org/pipermail/gcc-patches/attachments/20080831/c35759b1/attachment.bin>