[PATCH] Fix altivec easy_vector_constant_add_self splitter for V4SFmode (PR target/37168)

[Jakub Jelinek]

Hi!

movv4sf_internal pattern matches easy altivec constants of all 4 modes (the
pattern is :V), but for the ones where value as int is above 15 relies on
splitting.  But the splitter which it relies on is only :VI, so doesn't
accept V4SFmode and so gcc ICEs.  The following patch fixes that, by
handling even V4SFmode in the splitter (computing the constant in V4SImode
instead) and making sure easy_vector_constant_add_self works for V4SFmode.

Ok for trunk/4.3 if testing succeeds?

2008-08-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/37168
	* config/rs6000/rs6000-protos.h (const_vector_elt_as_int): Add
	prototype.
	* config/rs6000/rs6000.c (const_vector_elt_as_int): No longer static.
	* config/rs6000/altivec.md (easy_vector_constant_add_self splitter):
	Also split V4SFmode.
	* config/rs6000/predicates.md (easy_vector_constant_add_self): Handle
	vector float modes.

	* gcc.target/powerpc/pr37168.c: New test.

--- gcc/config/rs6000/rs6000-protos.h.jj	2008-07-28 16:46:58.000000000 +0200
+++ gcc/config/rs6000/rs6000-protos.h	2008-08-29 17:17:54.000000000 +0200
@@ -1,5 +1,5 @@
 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
-   Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+   Copyright (C) 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008
    Free Software Foundation, Inc.
    Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
 
@@ -31,6 +31,7 @@ extern void init_cumulative_args (CUMULA
 #endif /* TREE_CODE */
 
 extern bool easy_altivec_constant (rtx, enum machine_mode);
+extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int);
 extern bool macho_lo_sum_memory_operand (rtx, enum machine_mode);
 extern int num_insns_constant (rtx, enum machine_mode);
 extern int num_insns_constant_wide (HOST_WIDE_INT);
--- gcc/config/rs6000/altivec.md.jj	2008-07-28 16:46:58.000000000 +0200
+++ gcc/config/rs6000/altivec.md	2008-08-29 17:19:22.000000000 +0200
@@ -1,5 +1,5 @@
 ;; AltiVec patterns.
-;; Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007
+;; Copyright (C) 2002, 2003, 2004, 2005, 2006, 2007, 2008
 ;; Free Software Foundation, Inc.
 ;; Contributed by Aldy Hernandez (aldy@quesejoda.com)
 
@@ -255,15 +255,15 @@
 })
 
 (define_split
-  [(set (match_operand:VI 0 "altivec_register_operand" "")
-	(match_operand:VI 1 "easy_vector_constant_add_self" ""))]
+  [(set (match_operand:V 0 "altivec_register_operand" "")
+	(match_operand:V 1 "easy_vector_constant_add_self" ""))]
   "TARGET_ALTIVEC && reload_completed"
   [(set (match_dup 0) (match_dup 3))
-   (set (match_dup 0) (plus:VI (match_dup 0)
-			       (match_dup 0)))]
+   (set (match_dup 0) (match_dup 4))]
 {
   rtx dup = gen_easy_altivec_constant (operands[1]);
   rtx const_vec;
+  enum machine_mode op_mode = <MODE>mode;
 
   /* Divide the operand of the resulting VEC_DUPLICATE, and use
      simplify_rtx to make a CONST_VECTOR.  */
@@ -271,10 +271,16 @@
 						   XEXP (dup, 0), const1_rtx);
   const_vec = simplify_rtx (dup);
 
-  if (GET_MODE (const_vec) == <MODE>mode)
+  if (op_mode == <MODE>mode)
+    {
+      op_mode = V4SImode;
+      operands[0] = gen_lowpart (op_mode, operands[0]);
+    }
+  if (GET_MODE (const_vec) == op_mode)
     operands[3] = const_vec;
   else
-    operands[3] = gen_lowpart (<MODE>mode, const_vec);
+    operands[3] = gen_lowpart (op_mode, const_vec);
+  operands[4] = gen_rtx_PLUS (op_mode, operands[0], operands[0]);
 })
 
 (define_insn "get_vrsave_internal"
--- gcc/config/rs6000/rs6000.c.jj	2008-08-26 21:33:53.000000000 +0200
+++ gcc/config/rs6000/rs6000.c	2008-08-29 17:17:18.000000000 +0200
@@ -2653,7 +2653,7 @@ num_insns_constant (rtx op, enum machine
    corresponding element of the vector, but for V4SFmode and V2SFmode,
    the corresponding "float" is interpreted as an SImode integer.  */
 
-static HOST_WIDE_INT
+HOST_WIDE_INT
 const_vector_elt_as_int (rtx op, unsigned int elt)
 {
   rtx tmp = CONST_VECTOR_ELT (op, elt);
--- gcc/config/rs6000/predicates.md.jj	2008-07-28 16:46:58.000000000 +0200
+++ gcc/config/rs6000/predicates.md	2008-08-29 17:19:54.000000000 +0200
@@ -1,5 +1,5 @@
 ;; Predicate definitions for POWER and PowerPC.
-;; Copyright (C) 2005, 2006, 2007 Free Software Foundation, Inc.
+;; Copyright (C) 2005, 2006, 2007, 2008 Free Software Foundation, Inc.
 ;;
 ;; This file is part of GCC.
 ;;
@@ -325,8 +325,8 @@
        (and (match_test "TARGET_ALTIVEC")
 	    (match_test "easy_altivec_constant (op, mode)")))
 {
-  rtx last = CONST_VECTOR_ELT (op, GET_MODE_NUNITS (mode) - 1);
-  HOST_WIDE_INT val = ((INTVAL (last) & 0xff) ^ 0x80) - 0x80;
+  HOST_WIDE_INT val = const_vector_elt_as_int (op, GET_MODE_NUNITS (mode) - 1);
+  val = ((val & 0xff) ^ 0x80) - 0x80;
   return EASY_VECTOR_15_ADD_SELF (val);
 })
 
--- gcc/testsuite/gcc.target/powerpc/pr37168.c.jj	2008-08-29 17:25:15.000000000 +0200
+++ gcc/testsuite/gcc.target/powerpc/pr37168.c	2008-08-29 17:25:33.000000000 +0200
@@ -0,0 +1,14 @@
+/* PR target/37168 */
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_altivec_ok } */
+/* { dg-options "-O2 -maltivec" } */
+
+#define C 3.68249351546114573519399405666776E-44f
+#define vector __attribute__ ((altivec (vector__)))
+
+vector float
+foo (vector float a)
+{
+  vector float b = __builtin_vec_madd (b, a, (vector float) { C, C, C, C });
+  return b;
+}

	Jakub