[patch committed] SH: Add FPUL_REGS to IRA_COVER_CLASSES

[Kaz Kojima]

Hi,

I've committed the attached patch as a follow-up for the IRA merge.
It adds the fpul register to IRA_COVER_CLASSES.  Without this,
some floating point codes for sh4 become worse with -fira.
The patch drops SHmedia's fr32 register from FPUL_REGS so to avoid
intersecting FPUL_REGS with FP_REGS.  The original FPUL_REGS
represents that fr32 is mapped to fpul in sh5 but I think this
feature isn't used in our backend and will not be used.
The patch is tested with bootstrap and the top level "make -k check"
with/without -fira on sh4-unknown-linux-gnu with no new failures.
It's also regtested for sh64-unknown-linux-gnu.

Regards,
	kaz
--
2008-08-27  Kaz Kojima  <kkojima@gcc.gnu.org>

	* config/sh/sh.h (REG_CLASS_CONTENTS): Drop fr32 from FPUL_REGS.
	(IRA_COVER_CLASSES): Add FPUL_REGS.

diff -uprN ORIG/ira/gcc/config/sh/sh.h LOCAL/ira/gcc/config/sh/sh.h
--- ORIG/ira/gcc/config/sh/sh.h	2008-08-25 09:12:04.000000000 +0900
+++ LOCAL/ira/gcc/config/sh/sh.h	2008-08-25 11:20:38.000000000 +0900
@@ -1466,7 +1466,7 @@ enum reg_class
 /* MAC_REGS:  */							\
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00300000 },	\
 /* FPUL_REGS:  */							\
-  { 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00400000 },	\
+  { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00400000 },	\
 /* SIBCALL_REGS: Initialized in CONDITIONAL_REGISTER_USAGE.  */	\
   { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 },	\
 /* GENERAL_REGS:  */							\
@@ -1510,7 +1510,7 @@ extern enum reg_class regno_reg_class[FI
 #define IRA_COVER_CLASSES						     \
 {									     \
   GENERAL_REGS, FP_REGS, PR_REGS, T_REGS, MAC_REGS, TARGET_REGS,  	     \
-  LIM_REG_CLASSES							     \
+  FPUL_REGS, LIM_REG_CLASSES						     \
 }
 
 /* When defined, the compiler allows registers explicitly used in the