[PATCH, MIPS] Add baddu Octeon instruction

[Adam Nemet]

This patch adds support for the baddu instruction which is a byte add
with an additional zero extension of the result.  It does not make sense
to expand this in a new addqi3 expander since addu/addiu in addsi3 can
do an equally good job.

Thus the patch adds patterns to combine the addition with the zero
extension.  There are three new patterns for each truncation type and,
in case of subreg truncation, for each endianness.

There are two testcases that don't work yet:

  long long
  hh (int a, int b)
  {
    return (a + b) & 0xff;
  }

and with -mabi=64

  unsigned char
  f (unsigned char a, unsigned char b)
  {
    return a + b;
  }


These fail because (zero_extend:DI (truncate:SI (plus:DI ...))) is
considered more expensive than its parts.  One way to fix this would be
to teach the cost function that a truncation and a zero extension
together can be accomplished with one instruction.  I am planning to
work on this later in stage3.

Bootstrapped and tested on mips64octeon-unknown-linux-gnu.  The new
testcase also works in 32-bit mode so there is no need to pass -mgp64.

OK to install?

Adam

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