[patch] [rs6000] implement vector float->int conversion for altivec
Dorit Nuzman
DORIT@il.ibm.com
Fri Aug 8 20:15:00 GMT 2008
Committed, with the formatting fixes.
thanks,
dorit
(See attached file: fp2int.aug8.txt)
David Edelsohn <dje@watson.ibm.com> wrote on 07/08/2008 01:16:54:
> * config/rs6000/rs6000.c (rs6000_builtin_conversion): Add case
for
> FIX_TRUNC_EXPR.
>
> Dorit,
>
> The rs6000 part of the patch is okay in concept, but needs
> multiple formatting fixes. Looking further, I see that functions
> rs6000_builtin_conversion, rs6000_builtin_mul_widen_even and
> rs6000_builtin_mul_widen_odd all need formatting fixes.
>
> In rs6000_builtin_conversion, your patch to case FLOAT_EXPR
> changes case V4SImode to add spaces at the end of the line. Please
remove
> the trailing spaces.
>
> ! case V4SImode:
>
> In rs6000_builtin_conversion, rs6000_builtin_mul_widen_even and
> rs6000_builtin_mul_widen_odd, including the new FIX_TRUNC_EXPR case, the
> "?:" ternary operator is formatted incorrectly: the "?" and ":" should be
> at the beginning of the new lines, not at the end of the previous lines.
> For example,
>
> return TYPE_UNSIGNED (type)
> ? rs6000_builtin_decls[ALTIVEC_BUILTIN_VCFUX]
> : rs6000_builtin_decls[ALTIVEC_BUILTIN_VCFSX];
>
> The patch is okay with the formatting fixes. Please fix the other
ternary
> operators in this patch or a subsequent patch.
>
> Thanks, David
>
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