[AVX]: Add some 265bit AVX patterns

Uros Bizjak ubizjak@gmail.com
Sun Apr 13 07:44:00 GMT 2008


H.J. Lu wrote:
> On Thu, Apr 10, 2008 at 10:43:11AM +0200, Uros Bizjak wrote:
>   
>> On Thu, Apr 10, 2008 at 7:51 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>
>>  (define_expand "<addsub><mode>3"
>> +  [(set (match_operand:AVX256MODEF2P 0 "register_operand" "")
>> +	(plusminus:AVX256MODEF2P
>> +	  (match_operand:AVX256MODEF2P 1 "nonimmediate_operand" "")
>> +	  (match_operand:AVX256MODEF2P 2 "nonimmediate_operand" "")))]
>> +  "AVX_VEC_FLOAT_MODE_P (<MODE>mode)"
>> +  "ix86_fixup_binary_operands_no_copy (<CODE>, <MODE>mode, operands);")
>> +
>> +(define_insn "*<addsub><mode>3"
>> +  [(set (match_operand:AVX256MODEF2P 0 "register_operand" "=x")
>> +	(plusminus:AVX256MODEF2P
>> +	  (match_operand:AVX256MODEF2P 1 "nonimmediate_operand" "<comm>x")
>> +	  (match_operand:AVX256MODEF2P 2 "nonimmediate_operand" "xm")))]
>> +  "AVX_VEC_FLOAT_MODE_P (<MODE>mode)
>> +   && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
>> +  "v<addsub>p<avxmodesuffixf2c>\t{%2, %1, %0|%0, %1, %2}"
>> +  [(set_attr "type" "sseadd")
>> +   (set_attr "mode" "<MODE>")])
>>
>> Do you really need to use unmodified
>> ix86_fixup_binary_operands_no_copy() and ix86_binary_operator_ok() for
>> three operand instructions? The later will call ix86_swap_operands_p,
>> and this function will try to match input with output for commutative
>> operators and IMO this is not what we want.
>>
>>     
>
> I think we still need it for AVX since we need to swap inputs
> when the memory operand is the first source and register is the second.
>   
This expander predicate will filter out unsupported memory operand 
combinations. For commutative operators, we can have one or the other 
operand in memory, and for non-commutative operators, only op2 can be in 
memory. We don't need to match op0 in any way for three-op instructions.

"(GET_RTX_CLASS (<CODE>) == RTX_COMM_ARITH && !(MEM_P (operands[1] && 
MEM_P (operands[2]))
  || (GET_RTX_CLASS (<CODE>) != RTX_COMM_ARITH && !MEM_P (operands[1]))"

(BTW: I don't know if gcc is smart enough to force operands in register 
by default when both operands point to the same memory location. 
Otherwise an optimization from ix86_fixup_binary_operands is required.)

For insn predicate,

"!(MEM_P (operands[1]) && MEM_P (operands[2]))"

should be enough.


Uros.



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