[Patch : M16C] 20-bit access

[Naveen H.S.]

Hi,

>> add.w	#_bar,a0	addhi3/1	
>> mov.w	[a0],r2	movhi_op/1
>> You can't put a FAR pointer into a0 - it's only 16 bits.

Yes, that's true. Hence, these two instructions were replaced by the
20-bit transfer instructions "LDE/STE" in the function
"m32c_disp_pattern". Finally, the instruction that will replace the 
above 2 instructions to support 20-bit transfer is "lde.w  _bar[a0],r2"

>> If we're using 20 bit patterns, we should not be using the
addhi/movhi
>> patterns - we should be using (new?) addpsi/movpsi ones.

The complier generates 16-bit(addhi/movhi) instructions for these 
transfers, as the M16C target supports only 16-bit pointer. Hence, the 
HI mode patterns are used to replace the 16-bit transfer by 20-bit 
transfer. This is done after checking the "far" attribute.

The patch was implemented for GCC-4.2 and was working as expected on 
the 20-bit memory region. The code generated by the patched toolchain
was tested on the hardware and it showed correct values being generated.

The patch is ported for GCC-4.4 and is working fine with correct values 
being read/written from/to 20-bit memory region. However, it resulted
in a regression due to the "m32c_disp_pattern" function. 

In the testcase "20000405-1.c", the pattern generated is:-

add.w  #_bar,a0 		; 8     addhi3/1
mov.w   [a0],mem0       ; 22    movhi_op/7

The "m32c_disp_pattern" failed to recognize the MEM registers and hence 
resulted in segmentation fault. Can you please suggest any method to 
recognize these MEM registers?

Regards,
Naveen.H.S.
KPIT Cummins Infosystems Ltd,
Pune (INDIA) 
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