subreg rtl documentation

[Paolo Bonzini]

> If you want to understand some of the (subreg (mem)) issues, look in
> combine.c.  Anywhere you find LOAD_EXTEND_OP is probably worth reading.
> 
> Painful, painful memories...

With some handwaving because I've not yet done any grepping, I wonder 
how many targets use LOAD_EXTEND_OP *and* do not support scheduling... 
On all the others, combine will not create subregs of mems and in fact 
(for example) Alpha already has patterns that do the right thing:

(define_insn "*zero_extendqisi2_bwx"
   [(set (match_operand:SI 0 "register_operand" "=r,r")
         (zero_extend:SI (match_operand:QI 1 "nonimmediate_operand" 
"r,m")))]
   "TARGET_BWX"
   "@
    and %1,0xff,%0
    ldbu %0,%1"
   [(set_attr "type" "ilog,ild")])

(see the second alternative)

Methinks, we could move the code using LOAD_EXTEND_OP in combine.c to 
simplify_gen_subreg and/or gen_lowpart_common, and be done with it.

Paolo