[PATCH] New -fstack-check implementation

Richard Sandiford rsandifo@nildram.co.uk
Thu Apr 3 20:24:00 GMT 2008


Eric Botcazou <ebotcazou@adacore.com> writes:
> The patch adds the static stack checking part to the major architectures by 
> means of back-end specific support.  Technically it's emitted in the RTL 
> prologue as an UNSPEC_VOLATILE instruction and output inline.  If there is
> no such support for a given architecture, the checking falls back on the old 
> implementation.

Did you consider emitting the checks as separate rtl insns, rather than
one big block of manually-created asm?  That solves some problems "for free".
E.g. you don't need to duplicate the logic to load large constants,
it's easier to handle the various compiler options options, and you
get the correct length attribute.  (AFAICT the MIPS pattern in the
patch has the wrong length.)

Other points about the MIPS stuff:

  - It unconditionally uses "sd" for the probe.  I think that should be
    "sw" for !TARGET_64BIT.

  - The code isn't MIPS16-compatible.  No requirement to make it work
    for MIPS16, but there needs to be a !TARGET_MIPS16 condition.

  - The code seems to be written as ".set nerorder" (with hand-filled
    delay slots).  Won't it fail to work correctly in ".set reorder"
    functions, like those with asm statements?  Likewise when
    -mno-explicit-relocs is used.

  - Nit, but one line is too long:

      fputs ("\tbeq\t$3,$12,", asm_out_file); assemble_name (asm_out_file, end_lab);

    I'd prefer this to be split over two lines.  The same goes for the
    earlier branch too.

Richard



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