[committed] MIPS16 section anchor support

[Richard Sandiford]

This patch adds MIPS16 support for section anchors.  I tried various
anchor ranges, each with a minimum offset of 0:

  intervals of 16 bytes
    (because the range of an unextended three-operand addiu is 0..15)

  intervals of 32 bytes
    (because the offset range of an unextended lb is 0..31)

  intervals of 64 bytes
    (because the offset range of an unextended lh is 0..62)

  intervals of 128 bytes
    (because the offset range of an unextended lw is 0..124)

Not surprisingly, the last of these gave better overall CSiBE results,
although there were some tests that made heavy use of addiu, lb or lh,
and that did better at the lower settings.  I therefore went for
intervals of 128 bytes.

I've attached a CSiBE comparison of -fno-section-anchors and
-fsection-anchors for four flag combinations:

  csibe-G8-yes.txt:  -G8 -mcode-readable=yes
  csibe-G0-yes.txt:  -G0 -mcode-readable=yes
  csibe-G8-no.txt:   -G8 -mcode-readable=no
  csibe-G0-no.txt:   -G0 -mcode-readable=no

All tests were run using mipsisa32r2-sde-elf and additionally used
the flags "-Os -mips32r2 -mips16 -fno-common".  To summarise:

-G8 -mcode-readable=yes                        2816229  2816921 :  100.02%
-G0 -mcode-readable=yes                        2825017  2813317 :   99.59%
-G8 -mcode-readable=no                         3002767  3001399 :   99.95%
-G0 -mcode-readable=no                         3196857  3171225 :   99.20%

Section anchors aren't a win for -G8 -mcode-readable=yes because of the
increased register pressure: we often have both the $gp anchor and the
non-gp anchors live at once.  However, section anchors with -G0 are
better than no section anchors with -G8, so if users are building
fully-MIPS16 code, they might want to consider using -G0 instead of -G8.
(gcc shouldn't do that by default because the -G setting is part
of the ABI.)

I'm hoping to make -fsection-anchors the default for -G0 and
-mcode-readable=no, but won't at the moment beacuse of the constant
reference problem that was breaking PowerPC bootstrap a while back.
This appeared to be the only difference between the -fsection-anchors
and -fno-section-anchor dejagnu results.

Regression-tested on mipsisa32r2-sde-elf.  Applied to mainline.

Richard

gcc/
	* config/mips/mips.c (mips_set_mips16_mode): Use separate anchor
	settings for MIPS16.
	(mips_use_anchors_for_symbol_p): Use default_use_anchors_for_symbol_p.

Index: gcc/config/mips/mips.c
===================================================================
--- gcc/config/mips/mips.c	2007-09-11 02:46:36.000000000 -0700
+++ gcc/config/mips/mips.c	2007-09-11 03:02:50.000000000 -0700
@@ -5646,6 +5646,14 @@ mips_set_mips16_mode (int mips16_p)
       /* Silently disable DSP extensions.  */
       target_flags &= ~MASK_DSP;
       target_flags &= ~MASK_DSPR2;
+
+      /* Experiments suggest we get the best overall results from using
+	 the range of an unextended lw or sw.  Code that makes heavy use
+	 of byte or short accesses can do better with ranges of 0...31
+	 and 0...63 respectively, but most code is sensitive to the range
+	 of lw and sw instead.  */
+      targetm.min_anchor_offset = 0;
+      targetm.max_anchor_offset = 127;
     }
   else 
     {
@@ -5667,6 +5675,9 @@ mips_set_mips16_mode (int mips16_p)
 	  if (align_functions == 0)
 	    align_functions = 8;
 	}
+
+      targetm.min_anchor_offset = TARGET_MIN_ANCHOR_OFFSET;
+      targetm.max_anchor_offset = TARGET_MAX_ANCHOR_OFFSET;
     }
 
   /* (Re)initialize mips target internals for new ISA.  */
@@ -8931,7 +8942,7 @@ mips_use_anchors_for_symbol_p (const_rtx
       return false;
 
     default:
-      return true;
+      return default_use_anchors_for_symbol_p (symbol);
     }
 }
 

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