Patch #1 to add SSE5 support to the x86 GCC compiler

Michael Meissner michael.meissner@amd.com
Fri Sep 7 14:58:00 GMT 2007


On Thu, Sep 06, 2007 at 08:09:22PM +0200, Jan Hubicka wrote:
> Are you sure this can't be solved by combinner splitter pattern?
> When combiner takes more than 3 instructions, you can add a define_split
> for the variant with two memories and offload into register as needed.
> It should still produce better code out of regalloc and save us from
> such a option normal user can at most try to flip.

Ok, after staring at combiner dumps last night, I figured out how to make a
define_split to handle the case.  What is happening is the combiner has already
combined one memory reference in the multiply and one memory reference in the
add, and when it tries to combine the two it would fail.  I can use the
destination register as a temporary and allow two memory references and do
split.

It is only the multiply/add type instructions that need this.  Other
instructions that take 4 operands don't need to handle 2 memory operations.

-- 
Michael Meissner, AMD
90 Central Street, MS 83-29, Boxborough, MA, 01719, USA
michael.meissner@amd.com




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