ARM: fix generation of widening multiply on v6+

Zack Weinberg zack@codesourcery.com
Mon Sep 3 18:46:00 GMT 2007


The ARM backend has a bug which prevents it from generating widening
multiply instructions (umull, smull, etc) when set to generate code for
ARMv6 or later.  The instructions were introduced in v3M and some
architectural constraints on register usage were relaxed in v6, which
means we need two different insn patterns for each hardware instruction
so we can tune the operand constraints for v3M-v5 and v6+ separately.

The bug is that the insn patterns with names known to optabs.c 
([u]mulsidi3, [u]mulsi3_highpart) are the v3M-v5 specific ones; the v6+ 
insns have names meaningful only to a human.  Thus, on v6+, the C 
condition for the named patterns fails and optabs falls back to a libcall.

The fix is to give the [u]mulsidi3 and [u]mulsi3_highpart names to 
expanders whose C conditions are satisfied for any v3M+ CPU, and have a 
pair of starred insns for the v3M-v5 and v6+ variants.

Tested via amd64-linux -> arm-eabi cross compiler and newlib simulator 
run, C and C++ only.  This is *almost* obvious but not quite; please review.

zw

	* config/arm/arm.md (mulsidi3, umulsidi3, mulsi3_highpart)
	(umulsi3_highpart): Make into expanders; existing insns are
	now named *[insn]_nov6.  Add stars to existing [insn]_v6
	counterparts' names.
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