[PATCH, x86_64]: Provide longlong.h definitions for 128bit operations

Ian Lance Taylor iant@google.com
Fri May 18 16:48:00 GMT 2007


Eric Botcazou <ebotcazou@libertysurf.fr> writes:

> > With the new lower-subreg patch, insns like adddi3 should split before
> > reload when possible.
> 
> If you haven't already done it, could you sketch the modifications that should 
> be made to a 32-bit back-end, now that the lower-subreg patch is integrated?

First I'll say that the lower-subreg patch is not yet completely
integrated.  There is another part of it, which I have working, but
which I'm holding in the hopes that it will work better in the DF
framework.  That is the part which tracks subreg lifetimes during
register allocation.

>From the backend perspective, the best way to take advantage of
lower-subreg is conceptually simple if sometimes awkward in practice:
for multi-word operations, use define_insn_and_split and split the
insns before reload.

For CC0-style machines, in which reload may clobber the flags
register, some multi-word operations will need two
define_insn_and_splits.  The first split should run before reload, and
should generate one or more insns which express the computation
entirely in terms of register-sized subregs.  The second split should
run after reload and should generate the actual instructions which use
the flags register.

The idea is that the first split into subregs will permit the
lower-subreg pass and the register allocator to allocate the values
involved as separate single registers rather than as a single
multi-word register.  The second split, which will be similar to
existing code, will then generate the real machine instructions for
the second scheduling pass.

For a non-CC0 style machine things are simpler.  Just split multi-word
operations before reload.  There was never any particular need to wait
until after reload to split them in the past.  And now you really
don't want to wait.

For clarity, the relevant distinction between a CC0 machine and a
non-CC0 machine is whether reload is going to generate loads and
stores which clobber the flags register.  On a non-CC0 machine the
flags register is not set by memory moves.  On a CC0 machine it is.

Ian



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