RFC/RFA: patch for PR 22156: improve SRA for bit-fields

[Alexandre Oliva]

On May  4, 2007, Eric Botcazou <ebotcazou@adacore.com> wrote:

>> I'm sorry, I'd mistaken your report as a miscompilation, that I hoped
>> would be fixed with my revised patch.  Now I see it's just an
>> optimization issue.

> It triggers other problems later, most notably ICEs.

Would you please let me know whether this is still the case for the
patch I've just posted in the thread "Reload bug & SRA oddness"?
http://gcc.gnu.org/ml/gcc-patches/2007-05/msg00317.html

> 2 *words* are put together and accessed as bitfields, i.e. the whole
> structure, this is a no-no in my opinion.

I'm not sure why this is bad, if the bitfield access patterns are
whole-word accesses, which presumably access a single register.  I see
that that register allocation may be poorer because of the pairing.
This is actually the same issue that Romal Zipel pointed out.

I wonder if clipping align at BITS_PER_WORD is the right answer...  It
would limit coalescing of wider bit-fields, but this is probably not
such a big deal.

-- 
Alexandre Oliva         http://www.lsd.ic.unicamp.br/~oliva/
FSF Latin America Board Member         http://www.fsfla.org/
Red Hat Compiler Engineer   aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist  oliva@{lsd.ic.unicamp.br, gnu.org}