[PATCH, i386]: Fix reload issues with SSE4.2 varible blend instructions

[Uros Bizjak]

Hello!

As already discussed, propagation of hard regs into insn pattern by
combine pass confuses reload. Attached patch changes SSE4.2 variable
blend instructions to not accept xmm0 hard registers in operands other
than operand[3] before reload.

The patch was botstrapped on i686-pc-linux-gnu and regression tested
for all default languages.

2007-06-04  Uros Bizjak  <ubizjak@gmail.com>

	* config/i386/predicates/md (reg_not_xmm0_operand): New predicate.
	(nonimm_not_xmm0_operand): Ditto.
	* config/i386/sse.md ("sse4_1_blendvpd"): Use "reg_not_xmm0_operand"
	as operand[0] and operand[1] predicate.  Use "nonimm_not_xmm0_operand"
	as operand[2] predicate.  Require "z" class XMM register for
	operand[3].  Adjust asm template.
	("sse4_1_blendvpd"): Ditto.
	("sse4_1_pblendvb"): Ditto.
 	* config/i386/i386.c (ix86_expand_sse_4_operands_builtin): Do not
	force op2 into xmm0 register for variable blend instructions.

Uros.
-------------- next part --------------
An embedded and charset-unspecified text was scrubbed...
Name: i386-blendv.diff.txt
URL: <http://gcc.gnu.org/pipermail/gcc-patches/attachments/20070604/54f4c700/attachment.txt>