[ColdFire 36/63] Use RTL for prologues and epilogues

[Roman Zippel]

Hi,

On Wed, 10 Jan 2007, Richard Sandiford wrote:

> ! /* Emit RTL for a MOVEM or FMOVEM instruction.  BASE + OFFSET represents
> !    the lowest memory address.  COUNT is the number of registers to be
> !    moved, with register REGNO + I being moved if bit I of MASK is set.
> !    STORE_P specifies the direction of the move and ADJUST_STACK_P says
> !    whether or not this is pre-decrement (if STORE_P) or post-increment
> !    (if !STORE_P) operation.  */
> ! 
> ! static rtx
> ! m68k_emit_movem (rtx base, HOST_WIDE_INT offset,
> ! 		 unsigned int count, unsigned int regno,
> ! 		 unsigned int mask, bool store_p, bool adjust_stack_p)
> ! {
> !   int i;
> !   rtx body, addr, src, operands[2];
> !   enum machine_mode mode;
> ! 
> !   body = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (adjust_stack_p + count));
> !   mode = reg_raw_mode[regno];
> !   i = 0;
> ! 
> !   if (adjust_stack_p)
> !     {
> !       src = plus_constant (base, (count
> ! 				  * GET_MODE_SIZE (mode)
> ! 				  * (HOST_WIDE_INT) (store_p ? -1 : 1)));
> !       XVECEXP (body, 0, i++) = gen_rtx_SET (VOIDmode, base, src);
> !     }

Unless something changed recently, this won't work. Although this is a 
parallel, the parser for the frame information scans and executes this 
serially and all following stack assignments would get a wrong offset. The 
parser could be fixed, but the simpler fix is to just put this at the end.

> ! (define_insn "*m68k_store_multiple_automod"
> !   [(match_parallel 0 ""
> !      [(set (match_operand:SI 1 "register_operand" "=a")
> ! 	   (plus:SI (match_operand:SI 2 "register_operand" "1")
> ! 		    (match_operand:SI 3 "const_int_operand")))])]
> !   "m68k_movem_pattern_p (operands[0], operands[1], INTVAL (operands[3]), true)"
> ! {
> !   return m68k_output_movem (operands, operands[0], INTVAL (operands[3]), true);
> ! })

I have a different version of this patch (which unfortunately had a few 
pieces missing, so I never submitted it), which does this:

(define_insn "*moveml_store"
  [(match_parallel 0 "movem_operation"
    [(unspec:SI [(match_operand:SI 1 "const_int_operand" "i")
                 (match_operand:BLK 2 "memory_operand" "=m")] UNSPEC_MOVEM)
     (set (match_operand:SI 3 "memory_operand" "=g")
         (match_operand:SI 4 "register_operand" "r"))])]
  ""
  "movem%.l %1,%2")

This means it uses a unspec for instruction parameter and I'm also 
considering to move the rest of the pattern into a frame related note, so 
the big m68k_movem_pattern_p/m68k_output_movem functions become 
unneccessary.

Anyway, unless you badly want to do these changes yourself, it's fine with 
me to commit this as is and I'll submit a cleanup patch later, once I 
have tested it fully with all your other changes on m68k hardware.

bye, Roman