RFA/RFC: GCC has an incorrect length for the ldc1 instruction

[Nick Clifton]

Hi Richard,

> Unfortunately, this isn't quite right.  DFmode moves still take
> 2 instructions when the target is a GPR.  For MIPS I, they will
> also take 2 instructions when the target is an FPR.

Darn, I was afraid that there might be a case like that.

> I think instead that mips_fetch_insns should try to prove that
> the move does not need to be split, and tell mips_address_insns
> about it.  Does the patch below work for you?

It does.  I also tested the patch on the slightly older sources that make up 
the toolchain that was sent to our customer (which compiles the test case with 
only one ldc1 instruction between a mfhi and a mult instruction) and it fixes 
that toolchain as well.

Cheers
   Nick