[patch] MIPS: 64bit floating point support for MIPS32R2

[David Ung]

New patch revision attached.

This patch adds -mfp64 for MIPS32R2 to allow the use of 64bit float insn, 
mfhc1/mthc1 instructions to access the high half of the FPU register.
I've restricted the -mgp32 -mfp64 to O32 only.
I've taken Richard's suggestion of retaining the modes in load_df_{low/high}.
As a consequence, I had to force the mode change (DI to DF) in 
mips_split_64bit_move such that the patterns would match.  (Instead of creating 
multiple versions of load_di_{low/high} and m{f/t}hc1_{di/df})
Some problems with complex float arguments etc which will be addressed in future 
patches.

Re-tested on cross-compiler (mipsisa32-sde-elf, O32 abi) under GNU sim with 
flags "-mip32r2 -mfp64".
regressions mostly ok.  (39 failures when running "-mips32r2", 42 failures with 
"-mip32r2 -mfp64")
Bootstrapped on linux.

Comments?

David.

     * config/mips/mips.h (ISA_HAS_FP4): Add MIPS32R2 + 64bit fpu
     combination.
     (ISA_HAS_MXHC1): True if ISA supports mfhc1 and mthc1 opcodes.
     (ASM_SPEC): Pass along -mfp32 and -mfp64.

     * config/mips/mips.c (mips_split_64bit_move): Use gen_mthc1 to set
     high part of FP register when in 64-bit FP register mode.
     Similarly use gen_mfhc1 to load high part of FP register.
     (override_options): Allow -mgp32 and -mfp64 combination if
     ISA_MIPS32R2 and TARGET_FLOAT64 (currently for O32 only).
     (mips_cannot_change_mode_class): Disallow implicit conversion
     to/from another non-float class when TARGET_FLOAT64.

     * config/mips/mips.md (define_constants): Add UNSPEC_MFHC1,
     UNSPEC_MTHC1.
     (movdi_32bit): Use !TARGET_FLOAT64 in condition pattern.
     (movdf_hardfloat_32bit): Similarly.
     (movdi_32bit_mips32r2_fp64): New DImode pattern for MIPS32R2 which
     optionally support a full 64-bit fpu.
     (movdf_hardfloat_mips32r2_fp64): Simlilarly, but for DFmode.
     (mthc1): New pattern to generate MTHC1 instruction.
     (mfhc1): New pattern to generate MFHC1 instruction.

     * testsuite/gcc.target/mips/mips.exp (dg-mips-options): Handle parsing
     of -mfp64, allowable when ISA >= 33 and float is enabled.
     * testsuite/gcc.target/mips/mips32r2-mxhc1.c: New test for checking
     the use of mthc1 and mfhc1 patterns.
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