[patch]: MIPS: Add mfhc1/mthc1 patterns for MIPS32R2 64bit fpu

[David Ung]

This extends my previous patch for adding -mfp64 for MIPS32R2 to allow the use 
of mfhc1/mthc1 instructions to access the high half of the FPU register.
Bootstrapped on linux.

David.

	* config/mips/mips.md (define_constants): Add UNSPEC_MFHC1,
	UNSPEC_MTHC1.
	(mthc1): New pattern to generate MTHC1 instruction.
	(mfhc1): New pattern to generate MFHC1 instruction.
	* config/mips/mips.c (mips_split_64bit_move): Use gen_mthc1 to set
	high part of FP register when in 64-bit FP register mode.
	Similarly use gen_mfhc1 to load high part of FP register.
	* config/mips/mips.h (ISA_HAS_MXHC1): True is ISA supports mfhc1
	and mthc1 opcodes.


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