[yara-branch] patch: Richard Henderson's subreg lowering, Inter-procedural register allocation for YARA, some tunning and cleaning up

[Vladimir Makarov]

Andrew Pinski wrote:

>
> On May 31, 2006, at 9:44 AM, Vladimir Makarov wrote:
>
>> This patch adds Richard Henderson's subreg lowering pass
>> (-flower-subreg which is default for -O2 and higher).  I've added it
>> because it helps crafty benchmark for x86 when YARA is used.
>
>
> Wit this patch, on PowerPC-darwin we get passed the original failure now
> which is cool but we hit another ICE.
>
> The small testcase:
> int f(double a) { return a; }
> ----
> Fails with:
> t.c:5: internal compiler error: in allocate_insn_allocnos, at yara- 
> insn.c:1504
>
> The RTL is:
> (insn 30 17 31 2 (set (reg:DI 123)
>         (unspec:DI [
>                 (fix:SI (reg:DF 33 f1 [ a ]))
>             ] 10)) 261 {fctiwz} (nil)
>     (expr_list:REG_DEAD (reg:DF 33 f1 [ a ])
>         (nil)))
>
> (insn 31 30 20 2 (set (mem/c/i:SI (plus:SI (reg/f:SI 113 sfp)
>                 (const_int 24 [0x18])) [3 S4 A32])
>         (unspec:SI [
>                 (reg:DI 123)
>             ] 32)) 262 {stfiwx} (nil)
>     (expr_list:REG_DEAD (reg:DI 123)
>         (nil)))
> The specific instructions in the md files are:
>
> (define_insn "fctiwz"
>   [(set (match_operand:DI 0 "gpc_reg_operand" "=f")
>         (unspec:DI [(fix:SI (match_operand:DF 1 "gpc_reg_operand"  "f"))]
>                    UNSPEC_FCTIWZ))]
>   "(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT &&  
> TARGET_FPRS"
>   "{fcirz|fctiwz} %0,%1"
>   [(set_attr "type" "fp")])
>
> (define_insn "stfiwx"
>   [(set (match_operand:SI 0 "memory_operand" "=Z")
>         (unspec:SI [(match_operand:DI 1 "gpc_reg_operand" "f")]
>                    UNSPEC_STFIWX))]
>   "TARGET_PPC_GFXOPT"
>   "stfiwx %1,%y0"
>   [(set_attr "type" "fpstore")])
>
> -------
> I want to say the problem is the DImode in a floating point register.
>
Yes, probably in the 2nd insn.  I hope to start work on other ports 
(x86_64, itanium, ppc) in two weeks.