[patch] Merge cfo-branch, RTL sequence abstraction (part 1)

Roger Sayle roger@eyesopen.com
Mon Jan 9 14:39:00 GMT 2006


On Mon, 9 Jan 2006, Richard Earnshaw wrote:
> > One reason that using a constant, does so well relatively on the ARM
> > is that the ARM backend currently doesn't honor optimize_size, so all
> > of the values returned are cycle counts rather than size estimates.
> > Given that ARM is a RISC architecture, using a constant is probably a
> > better approximation than its rtx_costs.  This is easily fixed, and
> > would allow not only your new pass, but combine, ivopts, expand and
> > numerous other optimizers to produce better code density.
>
> Eh? So what do you think this code in arm_override_options is doing?
>
>   if (optimize_size)
>     targetm.rtx_costs = arm_size_rtx_costs;
>   else
>     targetm.rtx_costs = all_cores[(int)arm_tune].rtx_costs;

I must have been having a bad day.  Sorry.  The arm backend does
indeed honor optimize_size.  I'd not come across the idiom of
changing targetm.rtx_cost at run-time, and the few (dead) checks
of optimize_size in arm_rtx_costs_1 misled me into thinking that
only a handful of RTX codes were parameterized for size.

I'll have to rethink my rationalization for why GCC produces such
poor code density compared to the ARM compiler, and likewise why
using rtx_costs with RTL sequence abstraction performs so poorly.

Sorry for any confusion caused by my misunderstanding.  My sincere
apologies to the ARM backend maintainers and CodeSourcery.

Roger
--




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