[PATCH] Fix PR middle-end/28690, indexed load/store performance + reload bug

[Ian Lance Taylor]

Paolo Bonzini <paolo.bonzini@lu.unisi.ch> writes:

> > -  return (commutative_operand_precedence (x)
> > -	  < commutative_operand_precedence (y));
> > +  int precedence_x = commutative_operand_precedence (x);
> > +  int precedence_y = commutative_operand_precedence (y);
> > +
> > +  /* Everything else being equal, preference registers with pointers
> > +     over registers without pointers.  This is desirable for performance
> > +     reasons on indexed load/store instructions for some processors.  */
> > +  if ((precedence_x == precedence_y)
> > +      && REG_P (x) && !REG_POINTER (x)
> > +      && REG_P (y) && REG_POINTER (y))
> > +    return 1;
> > +
> > +  return precedence_x < precedence_y;
> >  }
> 
> This patch does not necessarily work.  You should change other users
> of commutative_operand_precedence to agree with the new definition of
> swap_commutative_operands_p.

Yes, sorry about that.  We shouldn't use this.

And in fact I realized that if you fix LEGITIMIZE_MEMORY_ADDRESS, you
probably don't need this patch anyhow.

Ian