New branch: insn-select

Michael Matz matz@suse.de
Wed Aug 2 17:30:00 GMT 2006


Hi,

I just created the insn-select branch (off of trunk) containing currently 
the code I wrote shortly after the summit.  It intends to implement to 
what I agreed during the summit register allocation BoF, some sort of 
instruction and regclass selection, plus compensation code generation when 
a pseudo is used in conflicting contexts.  Currently it doesn't even 
select one regclass for each pseudo, doesn't do compensation code, and has 
no heuristics, and generally doesn't do very much :-)

I might be going off the dataflow branch somewhen, as I will need 
incremental updating of the regrefs (no dataflow problems need to be 
solved, just replacing one regref in some insns with other pseudos, and 
adding new instructions).  That once was possible with the old df code, 
but I think it currently isn't anymore (?)


Ciao,
Michael.
-- 

Index: svn.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/svn.html,v
retrieving revision 1.31
retrieving revision 1.32
diff -u -p -r1.31 -r1.32
--- svn.html    2 Aug 2006 03:21:22 -0000       1.31
+++ svn.html    2 Aug 2006 17:18:50 -0000       1.32
@@ -310,6 +310,19 @@ list therefore provides only some repres
   <code>[ra-improvements]</code> in the subject line.  The branch
   is maintained by <a href="mailto:bergner@vnet.ibm.com">Peter
   Bergner</a>.</dd>
+
+  <dt>insn-select</dt>
+  <dd>This branch aims to implement in early instruction selection
+  and register class selection pass, which runs before register allocation
+  and subsumes the current <code>regclass</code> pass.  In particular
+  the goal is to chose an alternative per instruction, usable as a base
+  during register allocation, which ideally is not changed during reload
+  if registers could be allocated.  This will not be possible in all cases,
+  especially when addresses generated during spilling will be invalid on
+  the target machine.  But we should be able to do away with fake register
+  classes representing strict unions of other register classes.
+  Patch should be marked with <code>[isel]</code> or <code>[insn-select]</code>
+  in the subject line.  The branch is maintained by Michael Matz.</dd>
 </dl>

 <h4>Architecture-specific</h4>



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