Incorrect DFA scheduling of output dependency.

Daniel Towner daniel.towner@picochip.com
Fri Sep 9 16:48:00 GMT 2005


Hi all,

Does anyone know what happened to the following patch? It looks like it
was never committed. I am planning on submitting a new port sometime
soon, and the port relies on the patch.

thanks,

dan.

> Vladimir N. Makarov wrote:
>
>>
>>>
>> Please try the following patch if it works for you, I could commit it 
>> into the main line.  It should solve the problem of generation of 
>> incorrect schedule for VLIW.  But the problem of generation of not 
>> optimal schedule will still exist because the first insn after the 
>> barrier behaves as one setting and using all registers.
>>
>> Vlad
>>
>> Vladimir Makarov  <vmakarov@redhat.com>
>>                                                                                
>>
>>        * sched-deps.c (sched_analyze_insn): Use more accurate dependence
>>        type for the first insn after MOVE_BARRIER.
>>  
>
>
> Sorry, the previous patch had some typos and failed to be compiled.  
> So here is the correct version of the patch.
>
> Vlad
>
>------------------------------------------------------------------------
>
>Index: sched-deps.c
>===================================================================
>RCS file: /cvs/gcc/gcc/gcc/sched-deps.c,v
>retrieving revision 1.65.2.1.2.1
>diff -c -p -r1.65.2.1.2.1 sched-deps.c
>*** sched-deps.c	20 May 2004 13:01:49 -0000	1.65.2.1.2.1
>--- sched-deps.c	7 Dec 2004 22:46:20 -0000
>*************** sched_analyze_insn (struct deps *deps, r
>*** 965,977 ****
>  	  EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
>  	    {
>  	      struct deps_reg *reg_last = &deps->reg_last[i];
>  	      add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
>! 	      add_dependence_list
>! 		(insn, reg_last->sets,
>! 		 reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
>! 	      add_dependence_list
>! 		(insn, reg_last->clobbers,
>! 		 reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
>  	    });
>  	}
>        else
>--- 965,980 ----
>  	  EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
>  	    {
>  	      struct deps_reg *reg_last = &deps->reg_last[i];
>+ 	      enum reg_note dep_type;
>+ 
>  	      add_dependence_list (insn, reg_last->uses, REG_DEP_ANTI);
>! 	      dep_type = (reg_pending_barrier == TRUE_BARRIER
>! 			  ? 0 : REGNO_REG_SET_P (reg_pending_uses, i)
>! 			  ? 0 : (REGNO_REG_SET_P (reg_pending_sets, i)
>! 				 || REGNO_REG_SET_P (reg_pending_clobbers, i))
>! 			  ? REG_DEP_OUTPUT : REG_DEP_ANTI);
>! 	      add_dependence_list (insn, reg_last->sets, dep_type);
>! 	      add_dependence_list (insn, reg_last->clobbers, dep_type);
>  	    });
>  	}
>        else
>*************** sched_analyze_insn (struct deps *deps, r
>*** 979,992 ****
>  	  EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
>  	    {
>  	      struct deps_reg *reg_last = &deps->reg_last[i];
>  	      add_dependence_list_and_free (insn, &reg_last->uses,
>  					    REG_DEP_ANTI);
>! 	      add_dependence_list_and_free
>! 		(insn, &reg_last->sets,
>! 		 reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
>! 	      add_dependence_list_and_free
>! 		(insn, &reg_last->clobbers,
>! 		 reg_pending_barrier == TRUE_BARRIER ? 0 : REG_DEP_ANTI);
>  	      reg_last->uses_length = 0;
>  	      reg_last->clobbers_length = 0;
>  	    });
>--- 982,999 ----
>  	  EXECUTE_IF_SET_IN_REG_SET (&deps->reg_last_in_use, 0, i,
>  	    {
>  	      struct deps_reg *reg_last = &deps->reg_last[i];
>+ 	      enum reg_note dep_type;
>+ 
>  	      add_dependence_list_and_free (insn, &reg_last->uses,
>  					    REG_DEP_ANTI);
>! 	      dep_type = (reg_pending_barrier == TRUE_BARRIER
>! 			  ? 0 : REGNO_REG_SET_P (reg_pending_uses, i)
>! 			  ? 0 : (REGNO_REG_SET_P (reg_pending_sets, i)
>! 				 || REGNO_REG_SET_P (reg_pending_clobbers, i))
>! 			  ? REG_DEP_OUTPUT : REG_DEP_ANTI);
>! 	      add_dependence_list_and_free (insn, &reg_last->sets, dep_type);
>! 	      add_dependence_list_and_free (insn, &reg_last->clobbers,
>! 					    dep_type);
>  	      reg_last->uses_length = 0;
>  	      reg_last->clobbers_length = 0;
>  	    });
>  
>

-- 
============================================================================
Daniel Towner
picoChip Designs Ltd, Riverside Buildings, 108, Walcot Street, BATH, BA1 5BG
daniel.towner@picochip.com
+44 (0) 7786 702589




More information about the Gcc-patches mailing list