[PATCH] Altivec vrsave_operation thinko

[David Edelsohn]

	Due to historical reasons, the pattern setting the vrsave register
is a PARALLEL with the source described as a VEC.  The predicate checked
the source as a pure register.  This actually did not cause problems
because the test of the value of the source safely could fail.  This patch
corrects the predicate to look inside the VEC.

	I do not want to rewrite the pattern at this late stage in the
release cycle.  I will check in tomorrow unless someone finds a problem.

David


	PR target/24772
	* config/rs6000/predicates.md (vrsave_operation): SET_SRC is a VEC.

Index: predicates.md
===================================================================
*** predicates.md	(revision 107035)
--- predicates.md	(working copy)
***************
*** 1038,1047 ****
      return 0;
  
    dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
!   src_regno  = REGNO (SET_SRC (XVECEXP (op, 0, 0)));
  
!   if (dest_regno != VRSAVE_REGNO
!       && src_regno != VRSAVE_REGNO)
      return 0;
  
    for (i = 1; i < count; i++)
--- 1038,1046 ----
      return 0;
  
    dest_regno = REGNO (SET_DEST (XVECEXP (op, 0, 0)));
!   src_regno  = REGNO (XVECEXP (SET_SRC (XVECEXP (op, 0, 0)), 0, 1));
  
!   if (dest_regno != VRSAVE_REGNO || src_regno != VRSAVE_REGNO)
      return 0;
  
    for (i = 1; i < count; i++)