Limit reload creativity on load 1 into xmm register
Jan Hubicka
jh@suse.cz
Fri May 13 21:54:00 GMT 2005
Hi,
reload is creative enought to use fld and memory store to load constant 1 into xmm registers.
While fixing the constraints I also noticed one missing #rf in movsf_1 so fixed it one the way.
Bootstrapped/regtested i686-pc-gnu-linux and x86-64-linux, makes minor performance improvement
on mesa. I've also checked that fld1 is used to load 1 into double register.
* i386.md (movsf_1, movdf_nointeger, movdf_integer, movxf_nointeger,
movxf_integer): Fix register preferencing.
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.618.4.4
diff -c -3 -p -r1.618.4.4 i386.md
*** config/i386/i386.md 29 Apr 2005 22:12:52 -0000 1.618.4.4
--- config/i386/i386.md 13 May 2005 17:35:45 -0000
***************
*** 2255,2263 ****
(define_insn "*movsf_1"
[(set (match_operand:SF 0 "nonimmediate_operand"
! "=f#xr,m ,f#xr,r#xf ,m ,x#rf,x#rf,x#rf ,m ,!*y,!rm,!*y")
(match_operand:SF 1 "general_operand"
! "fm#rx,f#rx,G ,rmF#fx,Fr#fx,C ,x ,xm#rf,x#rf,rm ,*y ,*y"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (reload_in_progress || reload_completed
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
--- 2255,2263 ----
(define_insn "*movsf_1"
[(set (match_operand:SF 0 "nonimmediate_operand"
! "=f#xr,m ,!f#xr,r#xf ,m ,x#rf,x#rf,x#rf ,m ,!*y,!rm,!*y")
(match_operand:SF 1 "general_operand"
! "fm#rx,f#rx,G ,rmF#fx,Fr#fx,C ,x#rf,xm#rf,x#rf,rm ,*y ,*y"))]
"!(MEM_P (operands[0]) && MEM_P (operands[1]))
&& (reload_in_progress || reload_completed
|| (ix86_cmodel == CM_MEDIUM || ix86_cmodel == CM_LARGE)
***************
*** 2420,2428 ****
(define_insn "*movdf_nointeger"
[(set (match_operand:DF 0 "nonimmediate_operand"
! "=f#Y,m ,f#Y,*r ,o ,Y*x#f,Y*x#f,Y*x#f ,m ")
(match_operand:DF 1 "general_operand"
! "fm#Y,f#Y,G ,*roF,F*r,C ,Y*x#f,HmY*x#f,Y*x#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
&& (reload_in_progress || reload_completed
--- 2420,2428 ----
(define_insn "*movdf_nointeger"
[(set (match_operand:DF 0 "nonimmediate_operand"
! "=f#Y,m ,!f#Y,*r ,o ,Y*x#f,Y*x#f,Y*x#f ,m ")
(match_operand:DF 1 "general_operand"
! "fm#Y,f#Y,G ,*roF,F*r,C ,Y*x#f,HmY*x#f,Y*x#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((optimize_size || !TARGET_INTEGER_DFMODE_MOVES) && !TARGET_64BIT)
&& (reload_in_progress || reload_completed
***************
*** 2540,2548 ****
(define_insn "*movdf_integer"
[(set (match_operand:DF 0 "nonimmediate_operand"
! "=f#Yr,m ,f#Yr,r#Yf ,o ,Y*x#rf,Y*x#rf,Y*x#rf,m")
(match_operand:DF 1 "general_operand"
! "fm#Yr,f#Yr,G ,roF#Yf,Fr#Yf,C ,Y*x#rf,m ,Y*x#rf"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT)
&& (reload_in_progress || reload_completed
--- 2540,2548 ----
(define_insn "*movdf_integer"
[(set (match_operand:DF 0 "nonimmediate_operand"
! "=f#Yr,m ,!f#Yr,r#Yf ,o ,Y*x#rf,Y*x#rf,Y*x#rf,m")
(match_operand:DF 1 "general_operand"
! "fm#Yr,f#Yr,G ,roF#Yf,Fr#Yf,C ,Y*x#rf,m ,Y*x#rf"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& ((!optimize_size && TARGET_INTEGER_DFMODE_MOVES) || TARGET_64BIT)
&& (reload_in_progress || reload_completed
***************
*** 2751,2757 ****
;; Do not use integer registers when optimizing for size
(define_insn "*movxf_nointeger"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,*r,o")
(match_operand:XF 1 "general_operand" "fm,f,G,*roF,F*r"))]
"optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
--- 2751,2757 ----
;; Do not use integer registers when optimizing for size
(define_insn "*movxf_nointeger"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,!f,*r,o")
(match_operand:XF 1 "general_operand" "fm,f,G,*roF,F*r"))]
"optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
***************
*** 2784,2790 ****
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
(match_operand:XF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"!optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
--- 2784,2790 ----
(set_attr "mode" "XF,XF,XF,SI,SI")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,m,!f#r,r#f,o")
(match_operand:XF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"!optimize_size
&& (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
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