[PATCH ARM] Improve neg[sd]f2 for vfp
Richard Earnshaw
Richard.Earnshaw@buzzard.freeserve.co.uk
Thu May 12 08:17:00 GMT 2005
This patch improves the code we generate when we have VFP and are using
negation in some circumstances where the value has to go via integer
registers. For exmaple, if we are compiling -with -mfpu=vfp
-mfloat-abi=softfp and have:
double f;
double a () { return -f; }
we would previously load f into a VFP register, negate it, transfer it to
r0,r1 and return. With this patch we can do all that in integer
registers, generating
a: ldr r3, .L3
ldmia r3, {r0-r1}
eor r0, r0, #-2147483648
bx lr
.L3:
.word f
Similarly, if we have
double x(void);
void p (int, double);
void q()
{
p(1, -x());
}
we would end up doing similar contortions. With the patch we now generate:
q:
str lr, [sp, #-4]!
bl x
mov r2, r1
eor r1, r0, #-2147483648
mov r0, #1
ldr lr, [sp], #4
b p
However, if we are already using VFP registers (or if there's an equal
choice for the register allocator) then we'll still use the VFP fneg[sd]
instructions.
double a,c;
void z()
{
c = -a;
}
z:
ldr r3, .L11
fldd d7, [r3, #0]
ldr r3, .L11+4
fnegd d7, d7
fstd d7, [r3, #0]
bx lr
Fully tested on arm-elf and by a series of inspections for VFP code.
Oh, finally I fixed a latent bug. The constraints on these two patterns
were using + on operand zero. That was just bogus.
2005-05-12 Richard Earnshaw <richard.earnshaw@arm.com>
* arm/vfp.md (negsf2_vfp): Add alternative using integer registers.
(negdf2_vfp): Likewise. Convert to define_insn_and_split and split
the alternatives using integer registers into the appropriate
primitives.
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