patch: fix scheduling for frv

[Aldy Hernandez]

Hi folks.

I'm committing the following patch from Eric that fixes some scheduling
problems.

Tested on frv-elf.

	2004-11-11  Eric Christopher  <echristo@redhat.com>

        * config/frv/frv.md: Add fr400_integer automaton. Don't
        allow TYPE_MUL, TYPE_MACC, or TYPE_CUT to issue in parallel
        to TYPE_MACC.

Index: config/frv/frv.md
===================================================================
RCS file: /cvs/uberbaum/gcc/config/frv/frv.md,v
retrieving revision 1.28
diff -c -p -r1.28 frv.md
*** config/frv/frv.md	26 Jan 2005 00:07:08 -0000	1.28
--- config/frv/frv.md	26 Jan 2005 18:51:34 -0000
***************
*** 768,773 ****
--- 768,776 ----
  ;; of memory unit collision in the same packet.  There's only one divide
  ;; unit too.
  
+ (define_automaton "fr400_integer")
+ (define_cpu_unit "fr400_mul" "fr400_integer")
+ 
  (define_insn_reservation "fr400_i1_int" 1
    (and (eq_attr "cpu" "fr400,fr405,fr450")
         (eq_attr "type" "int"))
***************
*** 788,805 ****
  (define_insn_reservation "fr400_i1_mul" 3
    (and (eq_attr "cpu" "fr400,fr405")
         (eq_attr "type" "mul"))
!   "i0")
  
  (define_insn_reservation "fr450_i1_mul" 2
    (and (eq_attr "cpu" "fr450")
         (eq_attr "type" "mul"))
!   "i0")
  
  (define_bypass 1 "fr400_i1_macc" "fr400_i1_macc")
  (define_insn_reservation "fr400_i1_macc" 2
    (and (eq_attr "cpu" "fr405,fr450")
         (eq_attr "type" "macc"))
!   "i0|i1")
  
  (define_insn_reservation "fr400_i1_scan" 1
    (and (eq_attr "cpu" "fr400,fr405,fr450")
--- 791,808 ----
  (define_insn_reservation "fr400_i1_mul" 3
    (and (eq_attr "cpu" "fr400,fr405")
         (eq_attr "type" "mul"))
!   "i0 + fr400_mul")
  
  (define_insn_reservation "fr450_i1_mul" 2
    (and (eq_attr "cpu" "fr450")
         (eq_attr "type" "mul"))
!   "i0 + fr400_mul")
  
  (define_bypass 1 "fr400_i1_macc" "fr400_i1_macc")
  (define_insn_reservation "fr400_i1_macc" 2
    (and (eq_attr "cpu" "fr405,fr450")
         (eq_attr "type" "macc"))
!   "(i0|i1) + fr400_mul")
  
  (define_insn_reservation "fr400_i1_scan" 1
    (and (eq_attr "cpu" "fr400,fr405,fr450")
***************
*** 809,815 ****
  (define_insn_reservation "fr400_i1_cut" 2
    (and (eq_attr "cpu" "fr405,fr450")
         (eq_attr "type" "cut"))
!   "i0")
  
  ;; 20 is for a write-after-write hazard.
  (define_insn_reservation "fr400_i1_div" 20
--- 812,818 ----
  (define_insn_reservation "fr400_i1_cut" 2
    (and (eq_attr "cpu" "fr405,fr450")
         (eq_attr "type" "cut"))
!   "i0 + fr400_mul")
  
  ;; 20 is for a write-after-write hazard.
  (define_insn_reservation "fr400_i1_div" 20