[rfc] Make regrename call recog

Andreas Krebbel krebbel1@de.ibm.com
Thu Aug 25 15:06:00 GMT 2005


Hello,

> IMO, no.  The renamer is careful to modify insns only in such a way that 
> the constraints are still met.  If that isn't the case on S/390, it 
> means that the constraint strings are incorrect.  In the ARM case, I 
> think it happened for an insn that only ever got generated with hard 
> regs in place and thus never needed any reloading, which is why this 
> wasn't detected before.  Is that true for your pattern as well?
No. The only thing I can see in regrename_optimize is that the registers
are checked regarding the register class and the mode. Constraints do not
seem to be involved. Contraints wouldn't help me here anyway.
Consider that we are talking about a match_parallel in the load multiple case.
There is no constraint which can force all set registers in the parallel
to be consecutive this is done in the predicate which currently is never
invoked by regrename.

Bye,

-Andreas-



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